PDU53
3-BIT, ECL-INTERFACED
PROGRAMMABLE DELAY LINE
(SERIES PDU53)
3
delay
devices, inc.
FEATURES
PACKAGES
N/C
16
15
14
13
12
11
10
9
IN
A2
A1
VEE
A0
N/C
N/C
N/C
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN
N/C
N/C
•
•
•
•
•
Digitally programmable in 8 delay steps
Monotonic delay-versus-address variation
Precise and stable delays
Input & outputs fully 100K-ECL interfaced & buffered
Available in 16-pin DIP (600 mil) socket or SMD
A2
N/C
GND
OUT
N/C
N/C
N/C
A1
GND
OUT
N/C
VEE
A0
N/C
N/C
N/C
N/C
N/C
N/C
N/C
PDU53-xx DIP
PDU53-xxC3 SMD
PDU53-xxM Military DIP PDU53-xxMC3 Mil SMD
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The PDU53-series device is a 3-bit digitally programmable delay line. The
delay, TDA, from the input pin (IN) to the output pin (OUT) depends on the
address code (A2-A0) according to the following formula:
IN
Signal Input
OUT Signal Output
A2
A1
A0
Address Bit 2
Address Bit 1
Address Bit 0
TDA = TD0 + TINC * A
VEE -5 Volts
GND Ground
where A is the address code, TINC is the incremental delay of the device,
and TD0 is the inherent delay of the device. The incremental delay is
specified by the dash number of the device and can range from 100ps through 3000ps, inclusively. The
address is not latched and must remain asserted during normal operation.
SERIES SPECIFICATIONS
DASH NUMBER SPECIFICATIONS
•
Total programmed delay tolerance: 5% or 40ps,
Part
Incremental Delay
Per Step (ps)
100 ± 50
Total Delay
Change (ns)
0.70
whichever is greater
Number
PDU53-100
PDU53-200
PDU53-250
PDU53-400
PDU53-500
PDU53-750
PDU53-1000
PDU53-1200
PDU53-1500
PDU53-2000
PDU53-2500
PDU53-3000
•
•
•
•
•
•
•
Inherent delay (TD0): 2.2ns typical
Address to input setup (TAIS): 2.9ns
Operating temperature: 0° to 85° C
Temperature coefficient: 100PPM/°C (excludes TD0)
Supply voltage VEE: -5VDC ± 0.7V
Power Supply Current: -150ma typical (50Ω to -2V)
Minimum pulse width: 3ns or 15% of total delay,
whichever is greater
1.40
200 ± 60
1.75
250 ± 60
2.80
400 ± 80
3.50
500 ± 100
750 ± 100
5.25
7.00
1000 ± 200
1200 ± 200
1500 ± 200
2000 ± 400
2500 ± 400
3000 ± 500
8.40
10.50
14.00
17.50
21.00
•
Minimum period: 8ns or 2 x pulse width, whichever
is greater
A2-A0
A i-1
Ai
NOTE: Any dash number between 100 and 3000
not shown is also available.
PWIN
TOAX
TAIS
IN
TDA
PWOUT
OUT
Figure 1: Timing Diagram
1997 Data Delay Devices
Doc #98003
3/18/98
DATA DELAY DEVICES, INC.
1
3 Mt. Prospect Ave. Clifton, NJ 07013
DATADELAY [ DATA DELAY DEVICES, INC. ]
