DS2152
RDNCD: RECEIVE DOWN CODE DEFINITION REGISTER (Address=15 Hex)
(MSB)
(LSB)
C0
C7
C6
C5
C4
C3
C2
C1
SYMBOL
POSITION NAME AND DESCRIPTION
C7
C6
C5
C4
C3
C2
C1
C0
RDNCD.7
RDNCD.6
RDNCD.5
RDNCD.4
RDNCD.3
RDNCD.2
RDNCD.1
RDNCD.0
Receive Down Code Definition Bit 7. First bit of the repeating
pattern.
Receive Down Code Definition Bit 6. A Don’t Care if a 1-bit
length is selected.
Receive Down Code Definition Bit 5. A Don’t Care if a 1 or 2-
bit length is selected.
Receive Down Code Definition Bit 4. A Don’t Care if a 1 to 3-
bit length is selected.
Receive Down Code Definition Bit 3. A Don’t Care if a 1 to 4-
bit length is selected.
Receive Down Code Definition Bit 2. A Don’t Care if a 1 to 5-
bit length is selected.
Receive Down Code Definition Bit 1. A Don’t Care if a 1 to 6-
bit length is selected.
Receive Down Code Definition Bit 0. A Don’t Care if a 1 to 7-
bit length is selected.
13.0 TRANSMIT TRANSPARENCY
Each of the 24 T1 channels in the transmit direction of the DS2152 can be either forced to be transparent
or, in other words, can be forced to stop Bit 7 Stuffing and/or Robbed Signaling from overwriting the data
in the channels. Transparency can be invoked on a channel by channel basis by properly setting the
TTR1, TTR2, and TTR3 registers.
TTR1/TTR2/TTR3:
TRANSMIT TRANSPARENCY REGISTER (Address=39 to 3B Hex)
(MSB)
CH8
CH16
CH24
(LSB)
CH1
CH9
CH7
CH15
CH23
CH6
CH14
CH22
CH5
CH13
CH21
CH4
CH12
CH20
CH3
CH11
CH19
CH2
CH10
CH18
TTR1 (39)
TTR2 (3A)
TTR3 (3B)
CH17
SYMBOL
POSITION NAME AND DESCRIPTION
CH24
TTR3.7
TTR1.0
Transmit Transparency Registers.
0=this DS0 channel is not transparent
CH1
1=this DS0 channel is transparent
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DALLAS [ DALLAS SEMICONDUCTOR ]
