DS1100L
NOTES:
1) Initial tolerances are ± with respect to the nominal value at +25°C and V
CC
= 3.3V for both leading
and trailing edge.
2) Temperature and voltage tolerance is with respect to the nominal delay value over the stated
temperature range, and a supply-voltage range of 3.0V to 3.6V.
3) All tap delays tend to vary unidirectionally with temperature or voltage changes. For example, if TAP
1 slows down, all other taps also slow down; TAP3 can never be faster than TAP2.
4) Intermediate delay values are available on a custom basis. For further information, call (972) 371-
4348.
5) All voltages are referenced to ground.
6) Measured with outputs open.
7) See
Test Conditions
section at the end of this data sheet.
8) Frequency higher than 1MHz result in higher I
CC
values.
9) At or near maximum frequency the delay accuracy can vary and will be application sensitive (i.e.,
decoupling, layout).
Figure 3. TEST CIRCUIT
4 of 6
DALLAS [ DALLAS SEMICONDUCTOR ]
