Multiphase Spread-Spectrum EconOscillator
DS1094L
will dither between 2MHz and 1.96MHz at a modulation
frequency determined by the selected dither frequen-
cy. Continuing with the same example, if D1 and D0
both equal zero, selecting f
MOSC
/128, then the dither
frequency would be 15.625kHz.
DS1094L’s control registers and illustrates bit locations
as well as other valuable information. The memory
address of each register is shown in the ADDRESS col-
umn. The factory default values programmed into EEP-
ROM are shown in the DEFAULT column. Refer to the
corresponding sections to determine what values to
write to the registers.
PRESCALER (02h)
D1, D0 Selects the dither frequency. Refer to Table 5.
Ph1, Ph0 Determines whether the two-phase, three-
phase, or four-phase mode is selected. Refer
to Table 3.
J1, J0
Selects the dither amount. Refer to Table 4.
P1, P0
Determines the prescaler value. Refer to
Table 2.
DAC (08h)
D3 to D0 This four-bit value determines the master oscil-
lator frequency, f
MOSC
. Refer to Table 1 and
the
Master Oscillator
section for a detailed
information on calculating the DAC value.
ADDR (0Dh)
WC
The EEPROM write control bit determines if
writes to control registers are automatically
backed up in NV memory (EEPROM) or
whether a write EE command is required to
write to NV memory. See the
EEPROM Write
Control
section for more information.
A2 to A0 This three-bit value determines the 2-wire
slave address.
WRITE EE COMMAND (3Fh)
This command can be used when the WC bit = 1 (see
explanation in the
EEPROM Write Control
section) to
transfer registers internally from SRAM to EEPROM. The
time required to store the values is one EEPROM write
cycle time. This command is not needed if WC = 0.
2-Wire Slave Address
The 2-wire serial interface is used to read and write the
control registers of the DS1094L. The default slave
address of the DS1094L is B0h (see Figure 4). Using
the 3 address bits (A2, A1, and A0) in the ADDR regis-
ter, the slave address can be changed to allow as
many as eight DS1094Ls reside on the same 2-wire
bus or to simply prevent address conflicts with other 2-
wire devices. The location of the address bits within the
ADDR register is shown in the
Control Registers
sec-
tion. A detailed description of the 2-wire interface is
found in the
2-Wire Serial Interface Description
section.
EEPROM Write Control
Since EEPROM does have a limited number of lifetime
write cycles (specified in the
NONVOLATILE MEMORY
CHARACTERISTICS
electrical table), it is possible to
configure the DS1094L to prevent EEPROM wear out
and eliminate the EEPROM write cycle time by using
the WC bit in the ADDR register. When the WC bit is 0
(default), register writes are automatically written into
EEPROM. The Write EE Command is not needed.
However, if WC = 1, then register writes are stored in
SRAM and only written to EEPROM when the user
sends the Write EE Command. If power to the device is
cycled, the last value stored in EEPROM is recalled.
The time required to store the values is one EEPROM
write cycle time. WC = 1 is ideal for applications that
frequently modify the frequency/registers.
Regardless of the value of the WC bit, the value of the
ADDR register is always written immediately to EEP-
ROM.
Control Registers
The DS1094L control registers are used to program the
frequency and features of the device. Table 6 lists the
Table 6. Control Registers
REGISTER
PRESCALER
DAC
ADDR
WRITE EE Command
ADDRESS
02h
08h
0Dh
3Fh
BINARY
MSB
D1
X
1
X
1
D0
X
1
X
1
Ph1
X
1
X
1
Ph0
X
1
J1
D3
J0
D2
A2
P1
D1
A1
LSB
P0
D0
A0
DEFAULT
11001101b
XXXX0000b
XXXX0000b
ACCESS
R/W
R/W
R/W
W
X
1
WC
No Data
X = Don’t care
X
1
= Don’t care, reads as 1
8
_____________________________________________________________________
DALLAS [ DALLAS SEMICONDUCTOR ]
