DS1077L
TABLE 1
EN0
SEL0
(BIT)
PDN0
(BIT)
CTRL0
(PIN)
OUT0
(PIN)
CTRL0
DEVICE
(BIT)
FUNCTION
MODE
Hi-Z
1
Power-Down
(OUT1 and OUT2)
0
0
0
Power-Down*
0
Hi-Z
Active
Active
1
0
1
0
1
0
Master Clk/M
Master Clk
Hi-Z
Master Clk
Hi-Z
0
1
1
1
0
1
0
0
0
MUX Select
Output Enable
Output Enable
Active
Active**
Master Clk/M
Hi-Z
1
Power-Down
(OUT1 and OUT2)
Master Clk
Power-Down
X
X
0
1
1
1
0
1
0
Active
Power-Down
Active
Hi-Z
Master Clk/M
Power-Down
*This mode is for applications where OUT0 is not used, but CTRL0 is used as a device shutdown.
**Default Condition
CONTROL PIN 1 (CTRL1) – A multifunctional input pin that can be selected as an output enable
and/or a power-down. Its function is determined by the user-programmable control register value of
PDN1. (See Table 2.)
TABLE 2
PDN1
(BIT)
CTRL1
(PIN)
CTRL1
OUT 1
Out Clk
Hi-Z
DEVICE MODE
Active*
FUNCTION
0
0
1
1
0
1
0
1
Output Enable
Output Enable
Power-Down
Power-Down
Active*
Out Clk
Active
Hi-Z
Power-Down
(OUT1 and OUT2)
*Default Condition
NOTE:
Both CTRL0 and CTRL1 can be configured as power-downs, they are internally “OR” connected so that
either of the control pins may be used to provide a power-down function for the whole device, subject to
appropriate settings of the PDN0 and PDN1 register bits. (See Table 3.)
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DALLAS [ DALLAS SEMICONDUCTOR ]
