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DS1073Z-60 参数 Datasheet PDF下载

DS1073Z-60图片预览
型号: DS1073Z-60
PDF下载: 下载PDF文件 查看货源
内容描述: 3V EconOscillator /分频器 [3V EconOscillator/Divider]
分类和应用: 微控制器和处理器外围集成电路uCs集成电路uPs集成电路光电二极管
文件页数/大小: 18 页 / 261 K
品牌: DALLAS [ DALLAS SEMICONDUCTOR ]
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DS1073
PIN DESCRIPTIONS
IN/OUT Pin (I/O):
This pin is the main oscillator output, with a frequency determined by clock
reference, M and N dividers. Except in programming mode this pin is always an output. In programming
mode this pin is an input and output.
External Oscillator Input (OSCIN):
This pin can be used to supply an external reference frequency to
the device.
Crystal Oscillator Connection (XTAL):
A crystal can be connected between this pin and OSCIN to
provide an alternative frequency reference. The crystal must be used in fundamental mode. If a crystal is
not used this pin should be left open.
Output Enable Function (OE pin):
The DS1073 also features a “synchronous” output enable. When
OE is at a high logic level the oscillator free runs. When this pin is taken low OUT is held low,
immediately if OUT is already low, or at its next high-to-low transition if OUT is high. This prevents any
possible truncation of the output pulse width when the enable is used. While the output is disabled the
master oscillator continues to run (producing an output at OUT0, if the
EN0
bit = 0) but the internal
counters (/N) are reset. This results in a constant phase relationship between OE’s return to a high level
and the resulting OUT signal. When the enable is released OUT will make its first transition within one
to two clock periods of the master clock.
Power-Down/Select Function (
PDN
/
SELX
pin):
The Power-Down/Select (
PDN
/
SELX
) pin has a user-
selectable function determined by one bit (PDN bit) of the user-programmable memory. According to
which function is selected, this pin will be referred to as
PDN
or
SELX
.
If the Power-Down function is selected (PDN bit = 1) a low logic level on this pin can be used to make
the device stop oscillating (active low) and go into a reduced power consumption state. The “Enabling
Sequencer” circuitry will first disable OUT in the same way as when OE is used. Next OUT0 will be
disabled in a similar fashion. Finally the oscillator circuitry will be disabled. In this mode both outputs
will go into a high-impedance state.
The power consumption in the power-down state is much less than if OE is used because the internal
oscillator (if used) is completely powered down. Even if an external reference or a crystal is used all of
the on-chip buffers are powered down to minimize current drain. Consequently the device will take
considerably longer to recover (i.e., achieve stable oscillation) from a power-down condition than if the
OE is used.
If the Select function is chosen (PDN bit = 0) this pin can be used to switch between the internal
oscillator and an external reference (or crystal) on the fly. When this mode is chosen the E/
I
select bit is
overridden, a high logic level on
SELX
will select the internal oscillator, a low logic level will select the
external reference (or crystal oscillator).
Reference Output (OUT0 pin):
A reference output, OUT0, is also available from the output of the
reference select mux. This output is especially useful as a buffered output of a crystal defined master
frequency. OUT0 is unaffected by the OE pin, but is disabled in a glitchless fashion if the device is
powered down. If this output is not required it can be permanently disabled by setting the
EN0
bit to 1,
and there will be a corresponding reduction in overall power consumption.
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