DS1065
Write MUX Register [02H]
This command allows the bus master to write to the DS1065’s MUX register.
Read MUX Register [A2H]
This command allows the bus master to read the DS1065’s MUX register.
TRANSACTION/DATA
Immediately following the Function Command, the 9 data bits are written to or read from the DS1065.
This data is written/read lsb first. The following diagrams illustrate the timing. Once data transfer is
complete a new transaction sequence can be started by re-initializing the device. Therefore to program
both the DIV and MUX registers two complete transaction sequences are required.
READ/WRITE TIME SLOTS
The definitions of write and read time slots are illustrated below. All time slots are initiated by the master
driving the data line low. The falling edge of the data line synchronizes the DS1065 to the master by
triggering a delay circuit in the DS1065. During write time slots, the delay circuit determines when the
DS1065 will sample the data line. For a read data time slot, if a 0 is to be transmitted, the delay circuit
determines how long the DS1065 will hold the data line low overriding the 1 generated by the master. If
the data bit is a 1, the DS1065 will leave the read data time slot unchanged.
WRITE 1 TIME SLOT Figure 14
60 ꢀs ≤ tSLOT < 120 ꢀs
1 ꢀs ≤ tLOW1 < 15 ꢀs
1 ꢀs ≤ tREC < ∞
WRITE 0 TIME SLOT Figure 15
60 ꢀs ≤ tLOW0 < tSLOT <120 ꢀs
1 ꢀs ≤ tREC < ∞
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DALLAS [ DALLAS SEMICONDUCTOR ]
