DS1044
TEST CONDITIONS
Ambient Temperature: 25°C
±
3°C
Supply Voltage (V
CC
): 5.0V
±
0.1V
Input Pulse:
High: 3.0V
±
0.1V
Low: 0.0V
±
0.1V
Source Impedance: 50Ω Max.
Rise and Fall Time: 3.0 ns Max. – Measured between 0.6V and 2.4V.
Pulse Width: 500 ns
Pulse Period: 1
µs
Output Load Capacitance: 15 pF
Output: Each output is loaded with the equivalent of one 74F04 input gate.
Data is measured at the 1.5V level on the rising and falling edges.
Note: The above conditions are for test only and do not restrict the devices under other data sheet conditions.
TIMING DIAGRAM
PERIOD
t
RISE
t
FALL
80%
1.5V
20%
IN
t
WI
t
PHL
t
PLH
t
WI
1.5V
1.5V
1.5V
OUT
1.5V
NOTES:
1. All voltages are referenced to ground.
2. @ V
CC
=5 volts and 25°C, delay accuracy on both the rising and falling edges within tolerances given in
Table 1.
3. Pulse width and duty cycle specifications may be exceeded, however, accuracy will be application sensitive
with respect to de–coupling, layout, etc.
021798 5/6
DALLAS [ DALLAS SEMICONDUCTOR ]
