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DS1033M-10 参数 Datasheet PDF下载

DS1033M-10图片预览
型号: DS1033M-10
PDF下载: 下载PDF文件 查看货源
内容描述: 3合1低压硅延迟线 [3-in-1 Low Voltage Silicon Delay Line]
分类和应用: 延迟线
文件页数/大小: 6 页 / 53 K
品牌: DALLAS [ DALLAS SEMICONDUCTOR ]
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DS1033  
TEST CONDITIONS  
Ambient Temperature:  
Supply Voltage (VCC):  
Input Pulse:  
25°C ±=3°C  
3.3V ±=0.1V  
High: 3.0V ±=0.1V  
Low: 0.0V ±=0.1V  
Source Impedance: 50=max.  
Rise and Fall Time: 3.0 ns max. - Measured between 0.6V and 2.4V.  
Pulse Width: 500 ns  
Pulse Period: 1 µs  
Output Load Capacitance: 15 pF  
Output:  
Each output is loaded with the equivalent of one 74F04 input gate.  
Data is measured at the 1.5V level on the rising and falling edges.  
Note: The above conditions are for test only and do not restrict the devices under other data sheet  
conditions.  
TIMING DIAGRAM  
NOTES:  
1. All voltages are referenced to ground.  
2. Pulse width and duty cycle specifications may be exceeded; however, accuracy will be application-  
sensitive with respect to de-coupling, layout, etc.  
3. VCC=3.3V ±=10%.  
4. VCC=2.7V.  
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