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DS1010S-200 参数 Datasheet PDF下载

DS1010S-200图片预览
型号: DS1010S-200
PDF下载: 下载PDF文件 查看货源
内容描述: [Silicon Delay Line, 1-Func, 10-Tap, True Output, CMOS, PDSO16, 0.300 INCH, SOIC-16]
分类和应用: 光电二极管输出元件逻辑集成电路延迟线
文件页数/大小: 6 页 / 59 K
品牌: DALLAS [ DALLAS SEMICONDUCTOR ]
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DS1010  
TEST SETUP DESCRIPTION  
Figure 3 illustrates the hardware configuration used for measuring the timing parameters on the DS1010.  
The input waveform is produced by a precision pulse generator under software control. Time delays are  
measured by a time interval counter (20 ps resolution) connected between the input and each tap. Each  
tap is selected and connected to the counter by a VHF switch control unit. All measurements are fully  
automated, with each instrument controlled by a central computer over an IEEE 488 bus.  
TEST CONDITIONS  
INPUT:  
Ambient Temperature:  
Supply Voltage (VCC):  
Input Pulse:  
25°C ± 3°C  
5.0V ± 0.1V  
High = 3.0V ± 0.1V  
Low = 0.0V ± 0.1V  
50 ohm max.  
3.0 ns max.  
500 ns (1 µs for -500)  
1 µs ( 2 µs for -500)  
Source Impedance:  
Rise and Fall Time:  
Pulse Width:  
Period:  
OUTPUT:  
Each output is loaded with the equivalent of one 74FO4 input gate. Delay is measured at the 1.5V level  
on the rising and falling edge.  
NOTE:  
Above conditions are for test only and do not restrict the operation of the device under other data sheet  
conditions.  
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