ES51998(60000counts)
DMM Analog front end/Insulation
During insulation R mode is setting, the SADC of ES51966 will convert the DUT terminal
voltage VA (higher voltage side VD1) & VB (lower voltage side VD2) sequentially. Use ohm’s
law calculation {RX = (VA-VB)/IRX} to get the target DUT insulation resistance easily. The
microprocessor gets the ADC data by checking status bit STA1:
Status indication
ADC data
STA1=1
STA1=0
VD1
VD2
The proper range control (RA / RB selection) depends on the HV source. The RA selection is
controlled by IRQ control bit. The RB is selected by Q2/Q1/Q0 control bits. The next range
table is an example of HV sourcing from 25V to 1000V.
Set IRQ=1 (IRVH1)
Set IRQ=0 (IRVH0)
RA
HV=25V
15.0kΩ ~
150.0kΩ
0.150MΩ ~
1.500MΩ
1.50MΩ ~
15.00MΩ
15.0MΩ ~
150.0MΩ
HV=50V
30.0kΩ ~
300.0kΩ
0.300MΩ ~
3.000MΩ
3.00MΩ ~
30.00MΩ
30.0MΩ ~
300.0MΩ
HV=100V
60.0kΩ ~
600.0kΩ
0.600MΩ ~
6.000MΩ
6.00MΩ ~
60.00MΩ
60.0MΩ ~
600.0MΩ
HV=250V
0.150MΩ ~
1.500MΩ
1.50MΩ ~
15.00MΩ
15.0MΩ ~
150.0MΩ
0.150GΩ ~
1.500GΩ
HV=500V
0.300MΩ ~
3.000MΩ
3.00MΩ ~
30.00MΩ
30.0MΩ ~
300.0MΩ
0.300GΩ ~
3.000GΩ
HV=1000V
0.600MΩ ~
6.000MΩ
6.00MΩ ~
60.00MΩ
60.0MΩ ~
600.0MΩ
0.600GΩ ~
6.000GΩ
RB
IRR1
IRR2
IRR3
IRR4
Q2 Q1 Q0
RB range
IRR1
IRR2
IRR3
IRR4
Best resolution*
0
0
0
1
1
0
1
1
0
0
1
0
1
0
1
0.1kΩ
1kΩ
0.01MΩ
0.1MΩ
N/A
Test mode (IRR5)
*Note: The best resolution depends on the external high voltage and SADC readings.
2.12 Sleep
Set CS pin (pin 80) to logic low to make the ES51998 entering the sleep mode. The current
consumption will be less than 3uA typically. Set CS pin to logic high or kept floating, the
ES51998 will return to normal operation.
ver. 1.7
26
12/01/12
CYRUSTEK [ Cyrustek corporation ]
