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ES51993 参数 Datasheet PDF下载

ES51993图片预览
型号: ES51993
PDF下载: 下载PDF文件 查看货源
内容描述: 11000计数ADC [11,000 Counts ADC]
分类和应用:
文件页数/大小: 18 页 / 406 K
品牌: CYRUSTEK [ Cyrustek corporation ]
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ES51993  
11,000 Counts ADC  
Function description  
1. Dual Slope A/DFour Phases Timing  
ES51993 is a dual-slope analog-to-digital converter (ADC). Figure 1 is a structure  
of dual-slope integrator. Its measurement cycle has two distinct phases: input signal  
integration (INT) phase and reference voltage integration (DINT) phase.  
In INT phase, the input signal is integrated for a fixed time period, then A/D  
enters DINT phase in which an opposite polarity constant reference voltage is  
integrated until the integrator output voltage becomes to zero. Since both the time  
period for input signal integration and the amount of reference voltage are fixed, thus  
the de-integration time is proportional to the input signal. Hence, we can define the  
mathematical equation about input signal, reference voltage integration (see Figure 1.):  
TINT  
1
1
VIN (t)dt =  
×VREF ×TDINT  
0
Buf × C int  
Buf × C int  
where, VIN (t) = input signal  
VREF = reference voltage  
TINT = integration time (fixed)  
TDINT = de-integration time (proportional toVIN (t) )  
Cint  
input  
signal  
Buf  
reference  
voltage  
integrator  
output  
B
RAZ  
input signal < 0  
input signal > 0  
different  
input  
integration  
time  
fixed slope  
fixed slope  
different  
input  
integration  
time  
Fixed  
integration deintegration  
time time  
Variable  
Fixed  
integration deintegration  
time time  
Variable  
Figure 1. the structure of dual-slope integrator and its output waveform.  
If VIN (t) is a constant, we can rewrite above equation:  
TINT  
VREF  
TDINT  
=
×VIN  
4
06/09/20  
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