ES5129
4-1/2 digit with LCD
O Output to LCD segment.
B3, C3, MINUS O Output to LCD segment.
9
F2, E2, DP2
10
11
12
13
14
15
16
17
18
19
A3, G3, D3
F3, E3, DP3
B4, C4, BC5
A4, G4, D4
F4, E4, DP4
BP3
O Output to LCD segment.
O Output to LCD segment.
O Output to LCD segment.
O Output to LCD segment.
O Output to LCD segment.
O LCD backplane signal
O LCD backplane signal
O LCD backplane signal
BP2
BP1
VDISP
P Negative supply for display drivers.
Input: Turns on most significant decimal point when HI.
20
DP4/OR
I/O
Output: Pulled HI when result count exceeds ±19,999.
Input: Turn on the 2nd significant decimal point when HI.
Output: Pulled HI when result count is less than ±1,000.
Input: when floating, ES5129 operates in the free-run
mode. When pulled high, the last display reading is held.
When pulled LO, the result counter contents are shown
incrementing during the de-integrate phase of cycle.
Output: Negative going edge occurs when the data latche
are upgraded. Can be used as a converter status signal.
21
DP3/UR
I/O
22
LATCH/HOLD I/O
23
24
25
26
V-
V+
CAZ
CINT
P Negative power supply terminal
P Positive power supply terminal
I/O Integrator amplifier input
I/O Integrator amplifier output
Input: when LO, continuity flag on the display is off.
When HI, continuity flag is on.
27
CONTINUITY I/O Output: HI when voltage between inputs is less than
+200mV. LO when voltage between inputs is more than
+200mV.
28
29
30
31
32
33
34
35
36
37
38
39
COMMON
CREF+
CREF-
BUFFER
IN_LO
IN_HI
O Set common-mode voltage of 3.2V below V+.
I/O Positive connection to external reference capacitor
I/O Negative connection to external reference capacitor
O Buffer amplifier output
I Negative input voltage terminal
I Positive input voltage terminal
REF_HI
REF_LO
DGND
RANGE
DP2
I Positive reference voltage terminal
I Negative reference voltage terminal
O Ground reference for digital section
I Pulled HIGH externally for 2V scale.
I When HI, decimal point 2 will be on.
I When HI, decimal point 1 will be on.
DP1
Output of first clock inverter. Input of second clock
40
OSC2
I/O
inverter.
3
07/03/01
CYRUSTEK [ Cyrustek corporation ]
