ES5120
3 3/4 DIGIT A/D CONVERTER
(3) Reference Integrate (Deintegrate) Phase
The reference capacitor, which was charged during the
Auto Zero phase, is connected to the input of the
integrating amplifier. The internal sign logic ensures that
the polarity of the reference voltage is always connected in
the phase which is opposite to that of the input voltage.
This causes the integrator to ramp back to zero at a constant
rate which is determined by the reference potential.
The amount of time required (TDEINT) for the integrating
amplifier to reach zero is directly proportional to the
amplitude of the voltage that was put on the integrating
capacitor (VINT) during the integration phase :
RINT CINT VINT
TDEINT =
VREF
The digital reading displayed is :
VIN + VIN −
VREF
Digital Count ＝
2000
(4) ADC System Timing
The oscillator frequency is divided by 2 prior to clocking
the internal decade counters. Each phase of the
measurement cycle has the following length :
Auto Zero
: 1999 to 5999 counts
: 2000 counts
Signal Integrate
Deintegrate
: 1 to 4001 counts
CYRUSTEK [ Cyrustek corporation ]
