PRELIMINARY
W209C Serial Configuration Map
1. The serial bits will be read by the clock driver in the following
order:
Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 0: Control Register (1 = Enable, 0 = Disable)
[8]
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin#
-
-
-
-
-
23
21, 22
-
Name
Reserved
Reserved
Reserved
Reserved
Reserved
24/48 MHz
48 MHz
Reserved
Default
0
0
0
0
0
1
1
0
Reserved
Reserved
Reserved
Reserved
Reserved
(Active/Inactive)
(Active/Inactive)
Reserved
Pin Function
W209C
2. All unused register bits (reserved and N/A) should be writ-
ten to a “0” level.
3. All register bits labeled “Initialize to 0" must be written to
zero during initialization. Failure to do so may result in high-
er than normal operating current. The controller will read
back the written value.
Byte 1: Control Register (1 = Enable, 0 = Disable)
[8]
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin#
32
33
35
36
37
39
40
41
Name
SDRAM7
SDRAM6
SDRAM5
SDRAM4
SDRAM3
SDRAM2
SDRAM1
SDRAM0
Default
1
1
1
1
1
1
1
1
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
Pin Description
Byte 2: Control Register (1 = Enable, 0 = Disable)
[8]
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin#
19
18
17
15
14
12
11
10
Name
PCI7
PCI6
PCI5
PCI4
PCI3
PCI2
PCI1
PCI0
Default
1
1
1
1
1
1
1
1
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
Pin Description
Note:
8. Inactive means outputs are held LOW and are disabled from switching. These outputs are designed to be configured at power-on and are not expected to be
configured during the normal modes of operation.
Document #: 38-07171 Rev. *A
Page 7 of 16
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