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CY8C24223A-24PVXI 参数 Datasheet PDF下载

CY8C24223A-24PVXI图片预览
型号: CY8C24223A-24PVXI
PDF下载: 下载PDF文件 查看货源
内容描述: PSoC混合信号阵列 [PSoC Mixed-Signal Array]
分类和应用:
文件页数/大小: 47 页 / 499 K
品牌: CYPRESS [ CYPRESS ]
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CY8C24x23A Final Data Sheet  
3. Electrical Specifications  
3.3.5  
DC Switch Mode Pump Specifications  
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V  
and -40°C TA 85°C, 3.0V to 3.6V and -40°C TA 85°C, or 2.4V to 3.0V and -40°C TA 85°C, respectively. Typical parameters  
apply to 5V, 3.3V, and 2.7V at 25°C and are for design guidance only.  
Table 3-13. DC Switch Mode Pump (SMP) Specifications  
Symbol  
Description  
Min  
4.75  
Typ  
5.0  
Max  
5.25  
Units  
Notes  
Configuration of footnote a. Average, neglecting  
ripple. SMP trip voltage is set to 5.0V.  
VPUMP 5V  
5V Output Voltage from Pump  
V
V
V
Configuration of footnote a. Average, neglecting  
ripple. SMP trip voltage is set to 3.25V.  
VPUMP 3V  
VPUMP 2V  
IPUMP  
3.3V Output Voltage from Pump  
2.6V Output Voltage from Pump  
Available Output Current  
3.00  
2.45  
3.25  
2.55  
3.60  
2.80  
Configuration of footnote a. Average, neglecting  
ripple. SMP trip voltage is set to 2.55V.  
Configuration of footnote a  
.
V
V
V
BAT = 1.8V, VPUMP = 5.0V  
BAT = 1.5V, VPUMP = 3.25V  
BAT = 1.3V, VPUMP = 2.55V  
5
8
8
mA  
mA  
mA  
SMP trip voltage is set to 5.0V.  
SMP trip voltage is set to 3.25V.  
SMP trip voltage is set to 2.55V.  
Configuration of footnote a. SMP trip voltage is  
set to 5.0V.  
V
BAT5V  
Input Voltage Range from Battery  
1.8  
1.0  
1.0  
1.2  
5.0  
3.3  
3.0  
V
V
V
V
Configuration of footnote a. SMP trip voltage is  
set to 3.25V.  
VBAT3V  
Input Voltage Range from Battery  
Configuration of footnote a. SMP trip voltage is  
set to 2.55V.  
VBAT2V  
Input Voltage Range from Battery  
Configuration of footnote a. 0oC TA 100.  
1.25V at TA = -40oC.  
VBATSTART  
Minimum Input Voltage from Battery to Start Pump  
Configuration of footnote a. VO is the “Vdd  
Value for PUMP Trip” specified by the VM[2:0]  
setting in the DC POR and LVD Specification,  
Table 3-18 on page 27.  
VPUMP_Line  
Line Regulation (over VBAT range)  
Load Regulation  
5
5
%VO  
%VO  
Configuration of footnote a. VO is the “Vdd  
VPUMP_Load  
Value for PUMP Trip” specified by the VM[2:0]  
setting in the DC POR and LVD Specification,  
Table 3-18 on page 27.  
Configuration of footnote a. Load is 5 mA.  
VPUMP_Ripple Output Voltage Ripple (depends on capacitor/load)  
100  
50  
mVpp  
%
Configuration of footnote a. Load is 5 mA. SMP  
trip voltage is set to 3.25V.  
E3  
Efficiency  
35  
E2  
Efficiency  
FPUMP  
DCPUMP  
Switching Frequency  
Switching Duty Cycle  
1.3  
50  
MHz  
%
a. L = 2 µH inductor, C = 10 µF capacitor, D = Schottky diode. See Figure 3-2.  
1
1
1
D1  
Vdd  
VPUMP  
L1  
SMP  
Vss  
+
VBAT  
TM  
Battery  
PSoC  
C1  
Figure 3-2. Basic Switch Mode Pump Circuit  
September 8, 2004  
Document No. 38-12028 Rev. *B  
24  
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