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CY8C24223A-24PVXI 参数 Datasheet PDF下载

CY8C24223A-24PVXI图片预览
型号: CY8C24223A-24PVXI
PDF下载: 下载PDF文件 查看货源
内容描述: PSoC混合信号阵列 [PSoC Mixed-Signal Array]
分类和应用:
文件页数/大小: 47 页 / 499 K
品牌: CYPRESS [ CYPRESS ]
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CY8C24x23A Final Data Sheet  
3. Electrical Specifications  
3.3.3  
DC Operational Amplifier Specifications  
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V  
and -40°C TA 85°C, 3.0V to 3.6V and -40°C TA 85°C, or 2.4V to 3.0V and -40°C TA 85°C, respectively. Typical parameters  
apply to 5V, 3.3V, and 2.7V at 25°C and are for design guidance only.  
The Operational Amplifier is a component of both the Analog Continuous Time PSoC blocks and the Analog Switched Cap PSoC  
blocks. The guaranteed specifications are measured in the Analog Continuous Time PSoC block. Typical parameters apply to 5V at  
25°C and are for design guidance only.  
Table 3-7. 5V DC Operational Amplifier Specifications  
Symbol  
VOSOA  
Description  
Input Offset Voltage (absolute value)  
Power = Low, Opamp Bias = High  
Power = Medium, Opamp Bias = High  
Power = High, Opamp Bias = High  
Average Input Offset Voltage Drift  
Min  
Typ  
Max  
Units  
Notes  
1.6  
10  
8
mV  
1.3  
1.2  
7.0  
mV  
mV  
7.5  
µV/oC  
TCVOSOA  
IEBOA  
35.0  
Input Leakage Current (Port 0 Analog Pins)  
Input Capacitance (Port 0 Analog Pins)  
Common Mode Voltage Range  
20  
pA  
Gross tested to 1 µA.  
Package and pin dependent. Temp = 25 oC.  
CINOA  
4.5  
9.5  
pF  
V
VCMOA  
0.0  
0.5  
Vdd  
The common-mode input voltage range is mea-  
sured through an analog output buffer. The  
specification includes the limitations imposed  
by the characteristics of the analog output  
buffer.  
Common Mode Voltage Range (high power or high  
opamp bias)  
Vdd - 0.5  
GOLOA  
Open Loop Gain  
dB  
Specification is applicable at high power. For all  
other bias modes (except high power, high  
opamp bias), minimum is 60 dB.  
Power = Low, Opamp Bias = High  
Power = Medium, Opamp Bias = High  
Power = High, Opamp Bias = High  
High Output Voltage Swing (internal signals)  
Power = Low, Opamp Bias = High  
Power = Medium, Opamp Bias = High  
Power = High, Opamp Bias = High  
Low Output Voltage Swing (internal signals)  
Power = Low, Opamp Bias = High  
Power = Medium, Opamp Bias = High  
Power = High, Opamp Bias = High  
Supply Current (including associated AGND buffer)  
Power = Low, Opamp Bias = High  
Power = Low, Opamp Bias = High  
Power = Medium, Opamp Bias = High  
Power = Medium, Opamp Bias = High  
Power = High, Opamp Bias = High  
Power = High, Opamp Bias = High  
Supply Voltage Rejection Ratio  
60  
60  
80  
VOHIGHOA  
VOLOWOA  
ISOA  
Vdd - 0.2  
Vdd - 0.2  
Vdd - 0.5  
V
V
V
0.2  
0.2  
0.5  
V
V
V
150  
300  
600  
1200  
2400  
4600  
200  
400  
800  
1600  
3200  
6400  
µA  
µA  
µA  
µA  
µA  
µA  
dB  
PSRROA  
64  
0V VIN (Vdd - 2.30) or  
(Vdd - 1.25V) VIN Vdd.  
September 8, 2004  
Document No. 38-12028 Rev. *B  
19  
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