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CY8C24223A-24PVXI 参数 Datasheet PDF下载

CY8C24223A-24PVXI图片预览
型号: CY8C24223A-24PVXI
PDF下载: 下载PDF文件 查看货源
内容描述: PSoC混合信号阵列 [PSoC Mixed-Signal Array]
分类和应用:
文件页数/大小: 47 页 / 499 K
品牌: CYPRESS [ CYPRESS ]
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CY8C24x23A Final Data Sheet  
3. Electrical Specifications  
3.3.2  
DC General Purpose IO Specifications  
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V  
and -40°C TA 85°C, 3.0V to 3.6V and -40°C TA 85°C, or 2.4V to 3.0V and -40°C TA 85°C, respectively. Typical parameters  
apply to 5V, 3.3V, and 2.7V at 25°C and are for design guidance only.  
Table 3-5. 5V and 3.3V DC GPIO Specifications  
Symbol  
Description  
Min  
Typ  
5.6  
Max  
Units  
kΩ  
Notes  
RPU  
Pull up Resistor  
4
4
8
8
RPD  
VOH  
Pull down Resistor  
High Output Level  
5.6  
kΩ  
Vdd - 1.0  
V
IOH = 10 mA, Vdd = 4.75 to 5.25V (maximum  
40 mA on even port pins (for example, P0[2],  
P1[4]), maximum 40 mA on odd port pins (for  
example, P0[3], P1[5])). 80 mA maximum com-  
bined IOH budget.  
VOL  
Low Output Level  
0.75  
0.8  
V
IOL = 25 mA, Vdd = 4.75 to 5.25V (maximum  
100 mA on even port pins (for example, P0[2],  
P1[4]), maximum 100 mA on odd port pins (for  
example, P0[3], P1[5])). 150 mA maximum com-  
bined IOL budget.  
VIL  
Input Low Level  
Input High Level  
Input Hysterisis  
V
Vdd = 3.0 to 5.25  
Vdd = 3.0 to 5.25  
VIH  
VH  
2.1  
V
60  
1
mV  
nA  
pF  
pF  
IIL  
Input Leakage (Absolute Value)  
Capacitive Load on Pins as Input  
Capacitive Load on Pins as Output  
Gross tested to 1 µA.  
Package and pin dependent. Temp = 25oC.  
Package and pin dependent. Temp = 25oC.  
CIN  
COUT  
3.5  
3.5  
10  
10  
Table 3-6. 2.7V DC GPIO Specifications  
Symbol  
Description  
Min  
Typ  
Max  
Units  
Notes  
RPU  
Pull up Resistor  
4
5.6  
5.6  
8
8
kΩ  
kΩ  
V
RPD  
VOH  
Pull down Resistor  
High Output Level  
4
Vdd - 0.4  
IOH = 2 mA (6.25 Typ), Vdd = 2.4 to 3.0V (16  
mA maximum, 50 mA Typ combined IOH bud-  
get).  
VOL  
Low Output Level  
0.75  
V
IOL = 11.25 mA, Vdd = 2.4 to 3.0V (90 mA max-  
imum combined IOL budget).  
VIL  
Input Low Level  
Input High Level  
Input Hysteresis  
0.8  
V
Vdd = 2.4 to 3.0  
Vdd = 2.4 to 3.0  
VIH  
VH  
2.0  
V
90  
1
mV  
nA  
pF  
pF  
IIL  
Input Leakage (Absolute Value)  
Capacitive Load on Pins as Input  
Capacitive Load on Pins as Output  
Gross tested to 1 µA.  
Package and pin dependent. Temp = 25oC.  
Package and pin dependent. Temp = 25oC.  
CIN  
COUT  
3.5  
3.5  
10  
10  
September 8, 2004  
Document No. 38-12028 Rev. *B  
18  
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