2. Register Reference
This chapter lists the registers of the CY8C27xxx PSoC device by way of mapping tables, in offset order. For detailed register infor-
mation, reference the PSoC™ Mixed Signal Array Technical Reference Manual.
2.1
Register Conventions
2.2
Register Mapping Tables
The PSoC device has a total register address space of 512
bytes. The register space is also referred to as IO space and is
broken into two parts. The XOI bit in the Flag register deter-
mines which bank the user is currently in. When the XOI bit is
set, the user is said to be in the “extended” address space or
the “configuration” registers.
2.1.1
Abbreviations Used
The register conventions specific to this section are listed in the
following table.
Convention
Description
Read and write register or bit(s)
Read register or bit(s)
Note In the following register mapping tables, blank fields are
Reserved and should not be accessed.
RW
R
W
L
Write register or bit(s)
Logical register or bit(s)
Clearable register or bit(s)
Access is bit specific
C
#
May 2004
© Cypress MicroSystems, Inc. 2003 — Document No. 38-12011 Rev. *F
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CYPRESS [ CYPRESS ]
