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CY7C964-ASC 参数 Datasheet PDF下载

CY7C964-ASC图片预览
型号: CY7C964-ASC
PDF下载: 下载PDF文件 查看货源
内容描述: 总线接口逻辑电路 [Bus Interface Logic Circuit]
分类和应用: 总线控制器微控制器和处理器外围集成电路
文件页数/大小: 6 页 / 102 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY7C964
Application with Other Bus Architectures
The CY7C964 is optimized for applications requiring wide buff-
ers and high-performance multiplexing operations. The archi-
tecture can be configured to provide functions such as 16-bit
bidirectional three-state latch and 16-bit comparator with mask
register, or more complex functions such as 16-to-8 pipelined
bidirectional multiplexer with address counter/comparator cir-
cuitry. The device can be cascaded to generate counters and
comparators suitable for multiple byte address/data buses.
The on-chip 48 mA drivers can be directly connected to many
standard backplane buses.
Ordering Information
Ordering Code
CY7C964–ASC
CY7C964–NC
CY7C964–GM
CY7C964–GMB
CY7C964–UM
CY7C964–UMB
Package
Name
A64
N65
G68
G68
U65
U65
Package Type
64-Pin Thin Quad Flatpack
64-Pin Plastic Quad Flatpack
68-Pin Ceramic PGA
68-Pin Ceramic PGA
64-Pin Ceramic Quad Flatpack
64-Pin Ceramic Quad Flatpack
Military
Operating
Range
Commercial
Related Documents
VMEbus Interface Handbook
Document #: 38–00197–C
3