CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
4.1 CY7C68013A/15A Pin Descriptions
The FX2LP Pin Descriptions follows.[10]
Table 11. FX2LP Pin Descriptions
128 100
56
56
56
Name
AVCC
Type Default
Description
TQFP TQFP SSOP QFN VFBGA
10
17
9
10
14
3
7
2D
1D
Power
N/A Analog VCC. Connect this pin to 3.3V power source.
This signal provides power to the analog section of the
chip.
16
AVCC
Power
N/A Analog VCC. Connect this pin to 3.3V power source.
This signal provides power to the analog section of the
chip.
13
20
12
19
13
17
6
2F
1F
AGND
AGND
Ground
Ground
N/A AnalogGround. Connecttogroundwithasshortapath
as possible.
10
N/A AnalogGround. Connecttogroundwithasshortapath
as possible.
19
18
18
17
16
15
9
8
1E
2E
DMINUS
DPLUS
A0
I/O/Z
I/O/Z
Z
Z
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Z
Z
Z
Z
Z
Z
Z
Z
H
USB D– Signal. Connect to the USB D– signal.
USB D+ Signal. Connect to the USB D+ signal.
94
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
I/O/Z
8051 Address Bus. This bus is driven at all times.
When the 8051 is addressing internal RAM it reflects
the internal address.
95
A1
96
A2
97
A3
117
118
119
120
126
127
128
21
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
D0
22
23
24
25
59
8051 Data Bus. This bidirectional bus is high
impedance when inactive, input for bus reads, and
output for bus writes. The data bus is used for external
8051 program and data memory. The data bus is active
only for external bus accesses, and is driven LOW in
suspend.
60
D1
I/O/Z
61
D2
I/O/Z
62
D3
I/O/Z
63
D4
I/O/Z
86
D5
I/O/Z
87
D6
I/O/Z
88
D7
I/O/Z
39
PSEN#
Output
Program Store Enable. This active-LOW signal
indicates an 8051 code fetch from external memory. It
is active for program memory fetches from
0x4000–0xFFFF when the EA pin is LOW, or from
0x0000–0xFFFF when the EA pin is HIGH.
Note
10. Unused inputs must not be left floating. Tie either HIGH or LOW as appropriate. Outputs should only be pulled up or down to ensure signals at power up and in
standby. Note also that no pins should be driven while the device is powered down.
Document #: 38-08032 Rev. *N
Page 21 of 62
[+] Feedback
CYPRESS [ CYPRESS ]
