CY7C63001A
CY7C63101A
after reset
PC
Address
0x0000
0x0002
0x0004
0x0006
0x0008
0x000A
0x000C
0x000E
0x0010
Reset Vector
Interrupt Vector – 128
µs
Interrupt Vector – 1.024 ms
Interrupt Vector – USB Endpoint 0
Interrupt Vector – USB Endpoint 1
Reserved
Interrupt Vector – GPIO
Interrupt Vector – Cext
On-chip program Memory
0x07FF
2K ROM (CY7C63000A, CY7C63100A)
0x0FFF
4K ROM (CY7C63001A, CY7C63101A)
Figure 6-1. Program Memory Space
6.1.3
Data Memory Organization
The DSP pre-decrements by one whenever a PUSH
instruction is executed and it increments by one after a POP
instruction is used. The default value of the DSP after reset is
0x00, which would cause the first PUSH to write into USB
FIFO space for Endpoint 1. Therefore, the DSP should be
mapped to a location such as 0x70 before initiating any data
stack operations. Refer to the Reset section for more infor-
mation about DSP remapping after reset.
illustrates
the Data Memory Space.
The USB Controller includes 128 bytes of data RAM. The
upper 16 bytes of the data memory are used as USB FIFOs
for Endpoint 0 and Endpoint 1. Each endpoint is associated
with an 8-byte FIFO.
The USB controller includes two pointers into data RAM, the
Program Stack Pointer (PSP) and the Data Stack Pointer
(DSP). The value of PSP after reset is 0x00. The PSP incre-
ments by two whenever a CALL instruction is executed and it
decrements by two whenever a RET instruction is used.
Document #: 38-08026 Rev. *A
Page 4 of 25
CYPRESS [ CYPRESS SEMICONDUCTOR ]
