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CY7C1399B-12VC 参数 Datasheet PDF下载

CY7C1399B-12VC图片预览
型号: CY7C1399B-12VC
PDF下载: 下载PDF文件 查看货源
内容描述: 32K ×8 3.3V静态RAM [32K x 8 3.3V Static RAM]
分类和应用:
文件页数/大小: 10 页 / 153 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY7C1399B
Switching Waveforms
(continued)
Write Cycle No. 1 (WE Controlled)
[9, 14, 15]
t
WC
ADDRESS
CE
t
AW
WE
t
SA
t
PWE
t
HA
OE
t
SD
DATA I/O
NOTE 16
t
HZOE
DATA
IN
VALID
t
HD
Write Cycle No. 2 (CE Controlled)
[9, 14, 15]
t
WC
ADDRESS
CE
t
SA
t
AW
WE
t
SD
DATA I/O
DATA
IN
VALID
t
HD
t
HA
t
SCE
Write Cycle No. 3 (WE Controlled, OE LOW)
[10, 15]
t
WC
ADDRESS
CE
t
AW
WE
t
SA
t
HA
t
SD
DATA I/O
NOTE 16
t
HZWE
Notes:
14. Data I/O is high impedance if OE = V
IH
.
15. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
16. During this period, the I/Os are in the output state and input signals should not be applied.
t
HD
DATA
IN
VALID
t
LZWE
Document #: 38-05071 Rev. *C
Page 7 of 10