CY62128B
MoBL
Switching Waveforms
(continued)
Read Cycle No. 2 (OE Controlled)
[13, 14]
ADDRESS
t
RC
CE
1
CE
2
t
ACE
OE
t
DOE
DATA OUT
V
CC
SUPPLY
CURRENT
t
LZOE
HIGH IMPEDANCE
t
LZCE
t
PU
50%
DATA VALID
t
PD
50%
t
HZOE
t
HZCE
HIGH
IMPEDANCE
I
CC
I
SB
Write Cycle No. 1 (CE
1
or CE
2
Controlled)
[15, 16]
t
WC
ADDRESS
t
SCE
CE
1
CE
2
t
SA
t
AW
t
PWE
WE
t
SD
DATA I/O
DATA VALID
t
HD
t
SCE
t
HA
Notes:
14. Address valid prior to or coincident with CE
1
transition LOW and CE
2
transition HIGH.
15. Data I/O is high impedance if OE = V
IH
.
16. If CE
1
goes HIGH or CE
2
goes LOW simultaneously with WE going HIGH, the output remains in a high-impedance state.
Document #: 38-05300 Rev. *C
Page 6 of 11
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