CY2305, CY2309
Electrical Characteristics for CY2305SI-XX and CY2309SI-XX Industrial Temperature Devices
Parameter
V
IL
V
IH
I
IL
I
IH
V
OL
V
OH
Description
Input LOW Voltage
Input HIGH Voltage
Input LOW Current
Input HIGH Current
Output LOW Voltage
Output HIGH Voltage
V
IN
= 0V
V
IN
= V
DD
I
OL
= 8 mA (–1)
I
OH
=12 mA (–1H)
I
OH
= –8 mA (–1)
I
OL
= –12 mA (–1H)
REF = 0 MHz
Unloaded outputs at 66.67 MHz, SEL inputs at V
DD
Test Conditions
Min
–
2.0
–
–
–
2.4
–
–
Max
0.8
–
50.0
100.0
0.4
–
25.0
35.0
Unit
V
V
μA
μA
V
V
μA
mA
I
DD
(PD mode) Power Down Supply
Current
I
DD
Supply Current
Switching Characteristics for CY2305SI-1 and CY2309SI-1 Industrial Temperature Devices
Parameter
t1
t
DC
t3
t
4
t
5
t
6A
t
6B
t
7
t
J
t
LOCK
Name
Output Frequency
Duty Cycle
= t
2
÷
t
1
Rise Time
Fall Time
Output to Output Skew
30 pF load
10 pF load
Measured at 1.4V, F
out
= 66.67 MHz
Measured between 0.8V and 2.0V
Measured between 0.8V and 2.0V
All outputs equally loaded
Test Conditions
Min
10
10
40.0
–
–
–
–
1
–
–
–
Typ
–
50.0
–
–
85
–
5
–
70
–
Max
100
133.33
60.0
2.50
2.50
250
±350
8.7
700
200
1.0
Unit
MHz
MHz
%
ns
ns
ps
ps
ns
ps
ps
ms
Delay, REF Rising Edge to Measured at V
DD
/2
CLKOUT Rising Edge
Delay, REF Rising Edge to Measured at V
DD
/2. Measured in PLL Bypass Mode,
CLKOUT Rising Edge
CY2309 device only.
Device to Device Skew
Measured at V
DD
/2 on the CLKOUT pins of devices
Cycle to Cycle Jitter
PLL Lock Time
Measured at 66.67 MHz, loaded outputs
Stable power supply, valid clock presented on REF
pin
Switching Characteristics for CY2305SI-1H and CY2309SI-1H Industrial Temperature Devices
Parameter
t
1
t
DC
t
DC
t
3
t
4
t
5
t
6A
t
6B
t
7
Name
Output Frequency
Duty Cycle
= t
2
÷
t
1
Duty Cycle
= t
2
÷
t
1
Rise Time
Fall Time
Output to Output Skew
30 pF load
10 pF load
Measured at 1.4V, F
out
= 66.67 MHz
Measured at 1.4V, F
out
< 50 MHz
Measured between 0.8V and 2.0V
Measured between 0.8V and 2.0V
All outputs equally loaded
Description
Min
10
10
40.0
45.0
–
–
–
–
1
–
Typ
–
50.0
50.0
–
–
85
–
5
–
Max
100
133.33
60.0
55.0
1.50
1.50
250
±350
8.7
700
Unit
MHz
MHz
%
%
ns
ns
ps
ps
ns
ps
Delay, REF Rising Edge to Measured at V
DD
/2
CLKOUT Rising Edge
Delay, REF Rising Edge to Measured at V
DD
/2. Measured in PLL Bypass Mode,
CLKOUT Rising Edge
CY2309 device only.
Device to Device Skew
Measured at V
DD
/2 on the CLKOUT pins of devices
Document #: 38-07140 Rev. *J
Page 6 of 15
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