CY2305
CY2309
Typical Duty Cycle[8] and IDD Trends[9] for CY2305-1 and CY2309-1
Duty Cycle Vs VDD
(for 30 pF Loads over Frequency - 3.3V, 25C)
Duty Cycle Vs VDD
(for 15 pF Loads over Frequency - 3.3V, 25C)
60
60
58
56
58
56
54
52
50
48
46
44
42
40
54
52
50
48
46
44
42
40
33 MHz
66 MHz
100 MHz
133 MHz
33 MHz
66 MHz
100 MHz
3
3.1
3.2
3.3
3.4
3.5
3.6
3
3.1
3.2
3.3
3.4
3.5
3.6
VDD (V)
VDD (V)
Duty Cycle Vs Frequency
(for 30 pF Loads over Temperature - 3.3V)
Duty Cycle Vs Frequency
(for 15 pF Loads over Temperature - 3.3V)
60
58
56
54
52
50
48
46
44
42
40
60
58
56
54
52
50
48
46
44
42
40
-40C
0C
-40C
0C
25C
70C
85C
25C
70C
85C
20
40
60
80
100
120
140
20
40
60
80
100
120
140
Frequency (MHz)
Frequency (MHz)
IDD vs Number of Loaded Outputs
(for 30 pF Loads over Frequency - 3.3V, 25C)
IDD vs Number of Loaded Outputs
(for 15 pF Loads over Frequency - 3.3V, 25C)
140
120
100
80
140
120
100
80
33 MHz
66 MHz
100 MHz
33 MHz
66 MHz
100 MHz
60
60
40
40
20
20
0
0
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
# of Loaded Outputs
# of Loaded Outputs
Notes:
8. Duty Cycle is taken from typical chip measured at 1.4V.
9. I data is calculated from I = I
+ nCVf, where I
is the unloaded current. (n = # of outputs; C = Capacitance load per output (F); V = Supply
DD
DD
CORE
CORE
Voltage (V); f = frequency (Hz)).
Document #: 38-07140 Rev. *G
Page 8 of 14
CYPRESS [ CYPRESS ]
