PRELIMINARY
C9926
Low EMI Clock Generator for Intel 133MHz/ 2DIMM Chipset Systems
Suggested Crystal Oscillator Parameters
Characteristic
Frequency
Symbol
Fo
Min
Typ
Max
Units
MHz
PPM
PPM
PPM
Conditions
12.00
14.31818
16.00
Tolerance
TC
-
-
-
-
-
-
-
-
+/-100
Note 1
TS
+/- 100
Stability (Ta -10 to +60C) Note 1
Aging (first year @ 25C) Note 1
Parallel Resonant, Note 1
The crystal’s rated load. Note 1
Note 1
TA
-
5
-
Mode
OM
CL
-
Load Capacitance
20
40
-
pF
Effective Series
resistance (ESR)
R1
-
Ohms
Power Dissipation
DL
-
-
0.10
mW
Note 1
Note1: For best performance and accurate Center frequencies of this device, It is recommended but not mandatory that
the chosen crystal meets these specifications
For maximum accuracy, the total circuit loading capacitance should be equal to CL. This loading capacitance is the
effective capacitance across the crystal pins and includes the device pin capacitance (CP) in parallel with any circuit
traces, the clock generator and any onboard discrete load capacitors.
Budgeting Calculations
Device pin capacitance: Cxtal = 36pF
In order to meet the specification for CL = 18pF following the formula:
CL = (CXINTRACE + CXINDEVICE) X (CXOUTTRACE + CXOUTDEVICE
)
(CXINTRACE + CXINDEVICE) + (CXOUTRACE + CXOUTDEVICE
)
Then the board trace capacitance between Xin and the crystal should be no more than 4pF. (Same is applicable to the
trace between Xout and the crystal)
In this case the total capacitance from the crystal to Xin will be 40pF. Similarly the total capacitance between the crystal
and Xout will be 36pF. Hence using the above formula:
CL = 40 X 40 = 20pF
40 + 40
Cypress Semiconductor Corporation
525 Los Coches St.
Document#: 38-07070 Rev. **
5/4/2001
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress
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