+/+
Preliminary
…when timing is critical
C9853
High Performance Pentium
®
III Clock Generator
Group Offset Limits
Group
Offset
3V66 to PCI
1.5-3.5 nS 3V66 leads
Notes:
1. All offsets are to be measured at rising edges.
Measurement Loads (Lumped)
3V66@ 30 pF, PCI @ 30 pF
Measure Point
3V66@ 1.5V, PCI @ 1.5 V
Lumped Capacitive Test Loads for Single Ended Outputs
Clock
PCI Clocks (PCLK)
3VMref, 3VMref_b
3V66
48 MHz Clock
REF
CPU (1:6) (1:6)#
Max Load
30
20
30
20
20
Rs = 33.2 Rp = 49.9
Units
pF
pF
pF
pF
pF
Ohm
Test and Measurement Setup
For Differiential Output Signals
The following shows lumped test load configurations for the differential Host Clock Outputs. Multsel(0:1) = 0, 1
Rs
Rp
Test Nodes
Rs
Rp
Figure 3. Lumped Test Load Configuration
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA TEL 408-263-6300, FAX 408-263-6571
http://www.imicorp.com
1.0
4/13/2000
Page 8 of 16
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