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C9837AT 参数 Datasheet PDF下载

C9837AT图片预览
型号: C9837AT
PDF下载: 下载PDF文件 查看货源
内容描述: [Processor Specific Clock Generator, CMOS, PDSO48, TSSOP-48]
分类和应用: 光电二极管外围集成电路
文件页数/大小: 20 页 / 319 K
品牌: CYPRESS [ CYPRESS ]
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+/+…when timing is critical  
C9837  
Low EMI Clock Generator for Intel Mobile 133MHz/2 SO-DIMM Chipset Systems  
Preliminary  
Maximum Ratings  
This device contains circuitry that protects the inputs  
against damage due to high static voltages or electric  
field; however, precautions should be taken to avoid  
application of any voltage higher than the maximum  
rated voltages to this circuit. For proper operation, Vin  
and Vout should be constrained to the range:  
Maximum Input Voltage Relative to VSS: VSS - 0.3V  
Maximum Input Voltage Relative to VDD: VDD + 0.3V  
Storage Temperature:  
Operating Temperature:  
Maximum ESD Protection  
Maximum Power Supply:  
-65°C to + 150°C  
0°C to +70°C  
2KV  
VSS<(Vin or Vout)<VDD  
5.5V  
Unused inputs must always be tied to an appropriate  
logic voltage level (either VSS or VDD).  
DC Parameters (All outputs loaded per Table 6 below)  
Characteristic  
Symbol Min  
Typ  
Max  
Units  
V
Conditions  
Input Low Voltage  
VIL1  
VIH1  
VIL2  
-
-
-
-
-
1.0  
Note 1  
Input High Voltage  
2.0  
-
-
1.0  
-
V
Input Low Voltage  
V
Note 2  
Input High Voltage  
VIH2  
IIL1  
2.2  
V
Input Low Current (@VIL = VSS)  
Input High Current (@VIH =VDD)  
Tri-State leakage Current  
Dynamic Supply Current  
Dynamic Supply Current  
-5  
µA  
µA  
µA  
mA  
mA  
mA  
mA  
mA  
mA  
pF  
pF  
nH  
pF  
V
For internal Pull up resistors,  
Note 3  
IIH1  
5
Ioz  
-
-
-
-
-
-
10  
160  
60  
75  
90  
1
Idd3.3V  
Idd2.5V  
CPU @ 66MHz  
CPU @ 100MHz  
CPU @ 133MHz  
PD# = ‘0’  
-
-
Power Down Supply Current  
Power Down Supply Current  
Input pin capacitance  
Output pin capacitance  
Pin inductance  
Ipd3.3V  
Ipd2.5V  
Cin  
1
PD# = ‘0’  
-
-
5
Cout  
Lpin  
-
-
6
-
-
36  
7
Crystal pin capacitance  
Crystal DC Bias Voltage  
Crystal Startup time  
Cxtal  
VBIAS  
Txs  
34  
0.3Vdd  
-
38  
0.7Vdd  
40  
Measured from Pin to Ground. Note 4  
From Stable 3.3V power supply.  
Vdd/2  
-
µs  
VDD = VDDS = VDDP = AVDD = 3.3V 5%, VDDC = VDDI = 2.5V 5%, TA = 0 C to +70 C  
±
±
°
°
Note 1: Applicable to input signals: SEL(0,1), PD# (pull up), PCI_STP#, CPU_STP#  
Note 2: Applicable to SDATA, and SCLK.  
Note 3: Internal Pull up and Pull down resistors have a typical value of 350k (200K and 500K).  
Note 4: See applications data that is presented later in this data sheet on crystal interfacing.  
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.,  
MILPITAS, CA 95035, USA TEL: 408-263-6300, FAX 408-263-6571  
http://www.imicorp.com  
Rev 1.0  
3/30/2000  
Page 13 of 20