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C9777BYB 参数 Datasheet PDF下载

C9777BYB图片预览
型号: C9777BYB
PDF下载: 下载PDF文件 查看货源
内容描述: [Processor Specific Clock Generator, CMOS, PDSO48]
分类和应用: 时钟光电二极管外围集成电路晶体
文件页数/大小: 12 页 / 129 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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APPROVED PRODUCT
C9777
Low EMI Clock Generator for 440BX, ALi1631 & Via Pro133
+
/ Pentium
®
III Systems
Maximum Ratings
Maximum Input Voltage Relative to VSS: VSS - 0.3V
Maximum Input Voltage Relative to VDD: VDD + 0.3V
Storage Temperature:
Operating Temperature:
Maximum ESD protection
Maximum Power Supply:
-65ºC to + 150ºC
0ºC to +85ºC
2000V
5.5V
This device contains circuitry to protect the inputs
against damage due to high static voltages or electric
field; however, precautions should be taken to avoid
application of any voltage higher than the maximum
rated voltages to this circuit. For proper operation, Vin
and Vout should be constrained to the range:
VSS<(Vin or Vout)<VDD
Unused inputs must always be tied to an appropriate
logic voltage level (either VSS or VDD).
Electrical Characteristics
Characteristic
Input Low Voltage
Input High Voltage
Input Low Current (@VIL =
VSS)
Input High Current (@VIL =
VDD)
Tri-State leakage Current
Dynamic Supply Current
Dynamic Supply Current
Static Supply Current
Symbol
VIL1
VIH1
IIL
IIH
Ioz
Idd3.3V
Idd2.5V
Isdd
-
-
-
-
-
-
-
-
Min
-
2.0
-66
Typ
-
-
Max
0.8
-
-5
5
10
170
100
600
Units
Vdc
Vdc
µA
µA
µA
mA
mA
µA
CPU = 100.23 MHz, Note 1
CPU = 100.23 MHz, Note 2
-
Pull up
Pull up
Conditions
Applicable to Pins 25,26,27,28,29,30,31
VDD = 3.3V
±5%,
VDDC = VDDI = 2.5 + 5%, TA = 0ºC to +70ºC
Switching Characteristics
Characteristic
Output Duty Cycle
CPU – PCI Offset
Skew (CPU-CPU)
Skew (PCI-PCI)
∆Period
Adjacent Cycles
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Symbol
-
tcp
tSKEW1
tSKEW2
∆P
Min
45
1.5
-
-
-
Typ
50
-
-
-
-
Max
55
4.0
175
500
+250
Units
%
nS
pS
pS
pS
Conditions
Measured at 1.5V for 3.3V signals
Measured at 1.25V for 2.5 Volt signals
See note 5
See note 3
See note 3
See note 4
VDD = 3.3V
±5%,
VDDC = VDDI = 2.5 + 5%, TA = 0ºC to +70ºC
Measures current consumption through all vdd pins supplied with 3.3V (VDD, VDDS). All outputs loaded as per table7 below.
Measures current consumption through all vdd pins supplied with 2.5V (VDDC, VDDI). All outputs loaded as per table7 below.
All outputs loaded as per table 7 below. Probes are placed on the pins and taken at 1.5V levels.
This measurement is applicable with Spread Spectrum ON or OFF.
CPU clock leads. Cpu measured at rising edge 1.25 V, PCI at 1.5V.
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress.com
Document#: 38-07048 Rev. **
05/02/2001
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