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BCM88335L2CUBG 参数 Datasheet PDF下载

BCM88335L2CUBG图片预览
型号: BCM88335L2CUBG
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 1-Func, PBGA145, WLBGA-145]
分类和应用: 电信电信集成电路
文件页数/大小: 140 页 / 2728 K
品牌: CYPRESS [ CYPRESS ]
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BCM88335 Data Sheet  
Signal Descriptions  
Table 15: WLBGA Signal Descriptions (Cont.)  
WLBGA  
Ball#  
Signal Name  
Description  
Type  
WLAN GPIO Interface  
Note: The GPIO signals can be multiplexed via software and the JTAG_SEL pin to behave as various specific  
functions. See Table 21: “BCM88335 GPIO/SDIO Alternative Signal Functions,” on page 85 for additional  
details.  
B6  
C6  
D6  
B5  
C5  
D5  
C4  
D4  
H1  
GPIO_0  
GPIO_1  
GPIO_2  
GPIO_3  
GPIO_4  
GPIO_5  
GPIO_6  
GPIO_7  
GPIO_8  
Programmable GPIO pins.  
Note: These GPIO signals can  
be configured by software: as  
either inputs or outputs, to have  
internal pull-ups or pull-downs  
enabled or disabled, and to use  
either a high or low polarity  
upon assertion.  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
JTAG Interface  
E5  
JTAG_SEL  
JTAG select. Pull high to select I/O  
the JTAG interface. If the JTAG  
interface is not used, this pin  
may be left floating or  
connected to ground.  
Note: See  
Table 21: “BCM88335 GPIO/  
SDIO Alternative Signal  
Functions,” on page 85 for  
additional details.  
Clocks  
H12  
J12  
B4  
WRF_XTAL_IN  
WRF_XTAL_OUT  
LPO_IN  
XTAL oscillator input.  
XTAL oscillator output.  
I
O
I
External sleep clock input  
(32.768 kHz).  
H3  
CLK_REQ  
Reference clock request  
(shared by BT and WLAN).  
O
Bluetooth PCM  
G2  
BT_PCM_CLK/BT_PCMCLK PCM clock; can be master  
(output) or slave (input).  
I/O  
G1  
J3  
BT_PCM_IN  
PCM data input.  
PCM data output.  
I
BT_PCM_OUT  
BT_PCM_SYNC  
O
H2  
PCM sync; can be master  
(output) or slave (input).  
I/O  
Broadcom®  
September 23, 2015 • 88335-DS100-R  
Page 76  
BROADCOM CONFIDENTIAL  
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