BCM43907 Preliminary Data Sheet
Wireless LAN Subsystem
Section 7: Wireless LAN Subsystem
WLAN CPU and Memory Subsystem
The BCM43907 WLAN section includes an integrated 32-bit ARM Cortex-R4 processor with internal RAM and
ROM. The ARM Cortex-R4 is a low-power processor that features a low gate count, a small interrupt latency,
and low-cost debug capabilities. It is intended for deeply embedded applications that require fast interrupt
response features. Delivering more than a 30% performance gain over ARM7TDMI, the ARM Cortex-R4
implements the ARM v7-R architecture with support for the Thumb-2 instruction set.
At 0.19 µW/MHz, the Cortex-R4 is the most power efficient general-purpose microprocessor available,
outperforming 8- and 16-bit devices on MIPS/µW. It also supports integrated sleep modes.
On-chip memory for this CPU includes 576 KB of SRAM and 448 KB of ROM.
IEEE 802.11n MAC
The BCM43907 WLAN media access controller (MAC) is designed to support high-throughput operation with
low power consumption. It does so without compromising the Bluetooth coexistence policies, thereby enabling
optimal performance over both networks. In addition, several power-saving modes have been implemented that
allow the MAC to consume very little power while maintaining network-wide timing synchronization. The
architecture diagram of the MAC is shown in Figure 12.
The following sections provide an overview of the important MAC modules.
Broadcom®
March 12, 2016 • 43907-DS104-R
Page 44
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