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BCM4354XKUBGT 参数 Datasheet PDF下载

BCM4354XKUBGT图片预览
型号: BCM4354XKUBGT
PDF下载: 下载PDF文件 查看货源
内容描述: [Single-Chip 5G Wi-Fi IEEE 802.11ac 2×2 MAC/ Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver]
分类和应用:
文件页数/大小: 192 页 / 4575 K
品牌: CYPRESS [ CYPRESS ]
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BCM4354 Data Sheet  
I2S Interface  
I2S Interface  
The BCM4354 supports two independent I2S digital audio ports: one for Bluetooth audio, and one for high-  
fidelity FM audio. The I2S interface for FM audio supports both master and slave modes. The I2S signals are:  
I2S clock: BT_I2S_CLK  
I2S Word Select: BT_I2S_WS  
I2S Data Out: BT_I2S_DO  
I2S Data In: BT_I2S_DI  
BT_I2S_CLK and BT_I2S_WS become outputs in master mode and inputs in slave mode, whereas BT_I2S_DO  
always stays as an output. The channel word length is 16 bits, and the data is justified so that the MSB of the  
left-channel data is aligned with the MSB of the I2S bus, in accord with the I2S specification. The MSB of each  
data word is transmitted one bit clock cycle after the BT_I2S_WS transition, synchronous with the falling edge  
of the bit clock. Left-channel data is transmitted when IBT_I2S_WS is low, and right-channel data is transmitted  
when BT_I2S_WS is high. Data bits sent by the BCM4354 are synchronized with the falling edge of  
BT_I2S_CLK and should be sampled by the receiver on the rising edge of BT_I2S_CLK.  
The clock rate in master mode is either of the following:  
48 kHz x 32 bits per frame = 1.536 MHz  
48 kHz x 50 bits per frame = 2.400 MHz  
The master clock is generated from the input reference clock using a N/M clock divider.  
In the slave mode, any clock rate is supported to a maximum of 3.072 MHz.  
Broadcom®  
October 15, 2014 • 4354-DS109-R  
Page 58  
BROADCOM CONFIDENTIAL  
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