Overview
BCM4354 Data Sheet
Figure 2: BCM4354 Block Diagram
BCM4354
JTAG
WLAN
BT/FM
*SDIO or *PCIe 2.0
FMRX
PCIe
HSIC
Debug
PMU
Controller
SW REG
LDO
FM RX
FM RF
FM Digital
Power Supply
XTAL
Cortex M3
SDIO
LPO
AHB
XTAL OSC
POR
RAM
ROM
AHB2 APB
Bridge
APB
Patch
OTP
OTP
WD Timer
SW Timer
GPIO Ctrl
Inter Ctrl
DMA
ARM
GPIO
UART
JTAG
GPIO
UART
JTAG
Bus Arb
PTU
UART
SLIMBus
AHB
RAM
ROM
Debug UART
MEIF
BT RF
BT PHY
5 GHz IPA
CLB
I2S/PCM1
I2S/PCM2
BPF
LNA
2.4 GHz IPA
Diplexer
BT Digital IO
BPF
GPIO
LNA
5 GHz IPA
SMPS Control
BTFM Control Clock
Sleep
Clock
PMU
Controller
GNSS LNA ANT
Control
BPF
PMU
Timer Management
LNA
Diplexer
BPF
2.4 GHz IPA
Wake/Sleep
Control
BT-WLAN ECI
XO
LPO
POR
Coex
Buffer
Shared LNA
BT RX
BT TX
VBAT VREG
EXT LNA RF Switch Control
XTAL
POR
Broadcom®
October 15, 2014 • 4354-DS109-R
Page 18
BROADCOM CONFIDENTIAL
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