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BCM43455 参数 Datasheet PDF下载

BCM43455图片预览
型号: BCM43455
PDF下载: 下载PDF文件 查看货源
内容描述: [Single-Chip 5G WiFi IEEE 802.11ac MAC/Baseband/ Radio with Integrated Bluetooth 4.1 and FM Receiver]
分类和应用:
文件页数/大小: 159 页 / 2600 K
品牌: CYPRESS [ CYPRESS ]
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BCM43455 Preliminary Data Sheet  
External Frequency Reference  
Table 2: Crystal Oscillator and External Clock—Requirements and Performance (Cont.)  
External Frequency  
Crystala  
Referenceb c  
Parameter  
Conditions/Notes  
Min. Typ. Max. Min. Typ. Max. Units  
WRF_XTAL_XOP  
Input high level  
DC-coupled digital signal  
1.0  
1.26  
V
WRF_XTAL_XOP  
input voltage  
(see Figure 6 on  
page 30)  
IEEE 802.11a/b/g operation only –  
400  
1200 mV  
p-p  
WRF_XTAL_XOP  
input voltage  
(see Figure 6 on  
page 30)  
IEEE 802.11n/ac AC-coupled  
analog input  
1
V
p-p  
Duty cycle  
37.4 MHz clock  
40  
50  
60  
%
g
37.4 MHz clock at 10 kHz offset  
–129 dBc/Hz  
–136 dBc/Hz  
Phase Noise  
37.4 MHz clock at 100 kHz offset –  
37.4 MHz clock at 10 kHz offset  
37.4 MHz clock at 100 kHz offset –  
37.4 MHz clock at 10 kHz offset  
37.4 MHz clock at 100 kHz offset –  
(IEEE 802.11b/g)  
g
–137 dBc/Hz  
–144 dBc/Hz  
Phase Noise  
(IEEE 802.11a)  
g
–134 dBc/Hz  
–141 dBc/Hz  
Phase Noise  
(IEEE 802.11n,  
2.4 GHz)  
g
37.4 MHz clock at 10 kHz offset  
–142 dBc/Hz  
–149 dBc/Hz  
Phase Noise  
37.4 MHz clock at 100 kHz offset –  
(IEEE 802.11n,  
5 GHz)  
g
37.4 MHz clock at 10 kHz offset  
–148 dBc/Hz  
–155 dBc/Hz  
Phase Noise  
37.4 MHz clock at 100 kHz offset –  
(IEEE 802.11ac,  
5 GHz)  
a. (Crystal) Use WRF_XTAL_XON and WRF_XTAL_XOP.  
b. See “External Frequency Reference” on page 30 for alternative connection methods.  
c. For a clock reference other than 37.4 MHz, 20 × log10(f/ 37.4) dB should be added to the limits, where f = the  
reference clock frequency in MHz.  
d. BT_TM6 should be tied low for a 52 MHz clock reference. For other frequencies, BT_TM6 should be tied high.  
Note that 52 MHz is not an auto-detected frequency using the LPO clock.  
e. The frequency step size is approximately 80 Hz resolution.  
f. It is the responsibility of the equipment designer to select oscillator components that comply with these  
specifications.  
g. Assumes that external clock has a flat phase noise response above 100 kHz.  
Broadcom®  
November 5, 2015 • 43455-DS109-R  
Page 31  
BROADCOM CONFIDENTIAL  
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