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BCM4339XKWBGT 参数 Datasheet PDF下载

BCM4339XKWBGT图片预览
型号: BCM4339XKWBGT
PDF下载: 下载PDF文件 查看货源
内容描述: [Single-Chip 5G WiFi IEEE 802.11ac MAC/Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver]
分类和应用:
文件页数/大小: 183 页 / 4237 K
品牌: CYPRESS [ CYPRESS ]
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BCM4339 Preliminary Data Sheet  
Bluetooth Power Management Unit  
Table 4: Power Control Pin Description (Cont.)  
Signal  
Mapped to Pin  
Type Description  
O The BCM4339 asserts CLK_REQ when either the Bluetooth  
CLK_REQ  
BT_CLK_REQ_OUT  
WL_CLK_REQ_OUT  
or WLAN block wants the host to turn on the reference clock.  
The CLK_REQ polarity is active-high. Add an external 100  
kpull-down resistor to ensure the signal is deasserted  
when the BCM4339 powers up or resets when VDDIO is  
present.  
Note: Pad function Control Register is set to 0 for these pins. See “DC Characteristics” on page 122 for more  
details.  
Figure 6: Startup Signaling Sequence  
LPO  
Host IOs  
VDDIO  
unconfigured  
Host IOs configured  
T1  
HostResetX  
BT_GPIO_0  
(BT_DEV_WAKE)  
BT_REG_ON  
T2  
BTH IOs  
unconfigured  
BTH IOs configured  
BT_GPIO_1  
(BT_HOST_WAKE)  
T3  
Host drives  
this low.  
BT_UART_CTS_N  
BTH device drives this  
low indicating  
BT_UART_RTS_N  
CLK_REQ_OUT  
T4  
transport is ready.  
T5  
Driven  
Pulled  
Notes :  
ꢀꢁ T1 is the time for the host to settle its IOs after a reset.  
ꢀꢁ T2 is the time for the host to drive BT_REG_ON high after the host IOs are configured.  
ꢀꢁ T3 is the time for the BTH device to settle its IOs after a reset and the reference clock settling time has elapsed.  
ꢀꢁ T4 is the time for the BTH device to drive BT_UART_RTS_N low after the host drives BT_UART_CTS_N low. This assumes  
the BTH device has completed initialization.  
ꢀꢁ T5 is the time for the BTH device to drive CLK_REQ_OUT high after BT_REG_ON goes high. The CLK_REQ_OUT pin is used  
in designs that have an external reference clock source from the host. It is irrelevant on clock-based designs where the  
BTH device generates its own reference clock from an external crystal connected to its oscillator circuit.  
ꢀꢁ The timing diagram assumes that VBAT is present.  
Broadcom®  
November 17, 2014 • 4339-DS106-R  
Page 42  
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