CYW43362
Figure 3. Power Topology
CYW43362
CYW43362
VDDIO_RF
WL Radio – Part A
RF PLL
CYW43362
WL OTP (3.3V)
WRF AFE
1.2V
LN LDO1
Section
WRF XO
2.5V to
3.4V
sensitive to
power supply
noise
WRF CLPO/Ext. LPO
WRF LNA/Rx, BG, RCAL
WRFTx
LDO3P31
WRF Radio – BB PLL
VBAT 2.3V to 4.8V
WL_RST_N
1.4V to
1.8V
Core Buck
Regulator
Loads not
sensitive
to power
supply noise
WRF OTP
1.2V
CLDO
WL Digital, including
memory
ext_smps_req
ext_pwm_req
(30 mA)
Internal
LNLDO
WRF VCO and LOGEN
VDDIO
VIO
VDDIO_SD
Internal WLAN Power
Amplifiers
Notes:
1. LDO3P3 is always enabled when VIO is present in order
to provide bias for VDDIO_RF and the external RF switch.
2. Areas in dark gray are internal to the BCM43362.
3. VDDIO and VDDIO_SD can be powered from separate
supplies if SDIO signaling needs to be at a different level
than VDDIO. This diagram shows the more common case
where VDDIO and VDDIO_SD are powered from the same
supply.
Optional
(250 mA)
External device (BT/FM/GPS/other)
2.3 Voltage Regulators
All CYW43362 regulator output voltages are PMU programmable and have the following nominal capabilities. The currents listed
below indicate regulator capabilities. See System Power Consumption on page 52 for the actual expected loads.
■
■
■
■
Core Buck switching regulator (CBUCK): 2.3–4.8V input, nominal 1.5V output (up to 500 mA).
LDO3P3: 2.3–4.8V input, nominal 3.3V output (up to 40 mA)
CLDO (for the core): 1.45–2.0V input, nominal 1.2V output (up to 150 mA)
Low-noise LNLDO1: 1.45–2.0V input, nominal 1.2V output (up to 150 mA)
See Internal Regulator Electrical Specifications on page 48 for full regulator specifications.
2.4 PMU Sequencing
The WLAN PMU sequencer is responsible for minimizing system power consumption. It enables and disables various system
resources based on a computation of the required resources and a table that describes the relationship between resources and the
time needed to enable and disable them. Resource requests come from several sources: clock requests from cores, the minimum
resources defined in the ResourceMin register, and the resources requested by any active resource request timers. The PMU
sequencer maps clock requests into a set of resources required to produce the requested clocks.
Each resource is in one of four states: enabled, disabled, transition_on, and transition_off. Each resource has a timer that contains 0
when the resource is enabled or disabled and a nonzero value in the transition states. The timer is loaded with the resource's
time_on or time_off value when the PMU determines that the resource must be enabled or disabled. That timer decrements on each
LPO sleep clock. When it reaches 0, the state changes from transition_off to disabled or transition_on to enabled. If the time_on
value is 0, the resource can go immediately from disabled to enabled. Similarly, a time_off value of 0 indicates that the resource can
Document No. 002-14779 Rev. *G
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