CYW20702
8. Ball Grid Arrays
Figure 9 shows the top view of the following array:
■ 50-ball 4.5 x 4 x 0.8 mm (WFBGA)
Figure 9. 4.5 x 4 x 0.8 mm (WFBGA) Arra
1
2
3
4
5
6
7
8
A
B
C
D
E
F
G
y
Table 8. Ball-Out for the 50-Ball WFBGA
1
2
VREGHV
REG_EN
VSS
3
4
5
6
7
8
A
B
C
D
E
VREG
VBAT
RST_N
VDDO
VDDC
COEX_IN
VSS
HUSB_DN
OTP_DIS
GPIO_7
UART_RXD
SDA
HUSB_DP
CFG_SEL
VDD_USB
GPIO_3
VDDIF
VDDTF
RFP
GPIO_1
–
LPO_IN
PCM_SYNC
–
GPIO_0
–
–
VSS
VSS
TM2
–
VDDLNA
–
GPIO_6
UART_RTS_ VDDO
SPIM_CLK
N
F
VDDRF
VDDPX
VSS
XIN
RES
GPIO_5
VDDO
PCM_OUT
PCM_CLK
UART_TXD
PCM_IN
SCL
VDDC
G
XOUT
UART_CTS_ SPIM_CS_N
N
Document Number: 002-14773 Rev. *L
Page 29 of 55
CYPRESS [ CYPRESS ]
