CYW20738
Table 13 shows the digital level characteristics for (VSS = 0V).
Table 12. LDO Regulator Electrical Specifications
Parameter
Input voltage range
Default output voltage
Output voltage
Conditions
Min
1.425
–
Typ
Max
3.63
–
Unit
–
–
V
V
–
1.2
Range
Step size
0.8
–
–
1.4
–
V
40 or 80
mV
Accuracy at any step
–5
–
–
+5
%
Load current
–
–
30
mA
Line regulation
Load regulation
Vin from 1.425 to 3.63V, Iload = 30 mA
–0.2
–
–
0.2
0.2
%VO/V
%VO/mA
I
load from 1 µA to 30 mA, Vin = 3.3V, Bonding R
0.1
= 0.3Ω
Quiescent current
No load @Vin = 3.3V
Note: Current limit enabled
–
–
6
5
–
µA
nA
Power-down current
Vin = 3.3V, worst @ 70°C
200
Table 13. ADC Specifications
Parameter
ADC Characteristics
Number of Input channels
Channel switching rate
Input signal range
Reference settling time
Input resistance
Symbol
Conditions
Min
Typ
Max
Unit
–
fch
Vinp
–
–
–
–
28
–
–
–
kch/s
V
–
133.33
–
0
–
3.63
Changing refsel
7.5
–
–
–
–
s
Rinp
Cinp
fC
Effective, single-ended
500
–
k
pF
Input capacitance
Conversion rate
–
–
–
–
–
–
5
5.859
5.35
–
–
187
170.7
–
kHz
s
Conversion time
TC
R
–
Resolution
16
bits
Effective number of bits
–
–
See Table 2
on page 7
–
Absolute voltage
–
Using on-chip ADC firmware driver
–
±2
–
%
measurement error
Current
I
P
Iavdd1p2 + Iavdd3p3
–
–
–
1.5
–
1
–
mA
mW
nA
Power
–
Leakage current
Power-up time
Integral nonlinearity3
Differential nonlinearitya
Ileakage
Tpowerup
INL
T = 25°C
–
100
200
1
–
–
–
–
–
s
–1
–1
–
LSBa
LSBa
DNL
–
1
a. LSBs are expressed at the 10-bit level.
Document Number: 002-14891 Rev. *C
Page 28 of 42
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