CYW20737
Table 7. XTAL Oscillator Characteristics
Parameter
Symbol
Foscout
Conditions
Minimum
Typical
32.768
Maximum
Unit
kHz
Output frequency
–
–
–
–
–
Frequency
tolerance
–
Crystal dependent
100
ppm
Start-up time
Tstartup
Pdrv
–
–
–
–
–
500
–
ms
μW
kΩ
XTAL drive level
For crystal selection
For crystal selection
0.5
–
XTAL series resis-
tance
Rseries
70
XTAL shunt capaci- Cshunt
tance
For crystal selection
–
–
1.3
pF
1.13 GPIO Port
The CYW20737 has 14 general-purpose I/Os (GPIOs) in the 32-pin package. All GPIOs support programmable pull-up and pull-down
resistors, and all support a 2 mA drive strength except P26, P27, and P28, which provide a 16 mA drive strength at 3.3V supply.
The following GPIOs are available:
■ P0–P4
■ P8/P33 (Dual bonded, only one of two is available.)
■ P11/P27 (Dual bonded, only one of two is available.)
■ P12/P26 (Dual bonded, only one of two is available.)
■ P13/P28 (Dual bonded, only one of two is available.)
■ P14/P38 (Dual bonded, only one of two is available.)
■ P15
■ P24
■ P25
■ P32
For a description of all GPIOs, see Table 9. “GPIO Pin Descriptions”.
1.14 PWM
The CYW20737 has four internal PWM channels. The PWM module is described as follows:
■ PWM0–3
■ The following GPIOs can be mapped as PWMs:
❐ P26
❐ P27
❐ P14/P28 (Dual bonded, only one of two is available.)
❐ P13
■ Each of the PWM channels, PWM0–3, contains the following registers:
❐ 10-bit initial value register (read/write)
❐ 10-bit toggle register (read/write)
❐ 10-bit PWM counter value register (read)
■ The PWM configuration register is shared among PWM0–3 (read/write). This 12-bit register is used:
❐ To configure each PWM channel.
❐ To select the clock of each PWM channel.
❐ To change the phase of each PWM channel.
Document Number: 002-16365 Rev. *C
Page 14 of 36
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