CYW20732A0
Table 7. XTAL Oscillator Characteristics (Cont.)
Parameter
Symbol
Conditions
Minimum
Typical
Maximum
Unit
XTAL series resis- Rseries
tance
For crystal selection
–
–
–
–
70
kΩ
XTAL shunt capaci- Cshunt
tance
For crystal selection
1.3
pF
1.10 GPIO Port
The CYW20732 has 14 general-purpose I/Os (GPIOs) in the 32-pin package. All GPIOs support programmable pull-up and pull-down
resistors, and all support a 2 mA drive strength except P26, P27, and P28, which provide a 16 mA drive strength at 3.3V supply.
The following GPIOs are available:
■ P0–P4
■ P8/P33 (Dual bonded, only one of two is available.)
■ P11/P27 (Dual bonded, only one of two is available.)
■ P12/P26 (Dual bonded, only one of two is available.)
■ P13/P28 (Dual bonded, only one of two is available.)
■ P14/P38 (Dual bonded, only one of two is available.)
■ P15
■ P24
■ P25
■ P32
For a description of all GPIOs, see Table 9 on page 16.
1.11 PWM
The CYW20732 has four internal PWM channels. The PWM module is described as follows:
■ PWM0–3
■ The following GPIOs can be mapped as PWMs:
❐ P26
❐ P27
❐ P14/P28 (Dual bonded, only one of two is available.)
❐ P13
■ Each of the PWM channels, PWM0–3, contains the following registers:
❐ 10-bit initial value register (read/write)
❐ 10-bit toggle register (read/write)
❐ 10-bit PWM counter value register (read)
■ The PWM configuration register is shared among PWM0–3 (read/write). The 12-bit register is used:
❐ To configure each PWM channel.
❐ To select the clock of each PWM channel.
❐ To change the phase of each PWM channel.
Figure 8 shows the structure of one PWM channel.
Document Number: 002-14837 Rev. *L
Page 12 of 35
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