CYW20732A0
Figure 8. PWM Channel Block Diagram
pwm_cfg_adr register
pwm#_init_val_adr register
10
pwm#_togg_val_adr register
10
pwm#_cntr_adr
10
cntr value is CM3 readable
pwm_out
Example: PWM cntr w/ pwm#_init_val = 0 (dashed line)
PWM cntr w/ pwm#_init_val = x (solid line)
10'H3FF
pwm_togg_val_adr
10'Hx
10'H000
pwm_out
1.12 Power Management Unit
The power management unit (PMU) provides power management features that can be invoked by software through power
management registers or packet-handling in the baseband core.
1.12.1 RF Power Management
The BBC generates power-down control signals for the transmit path, receive path, PLL, and power amplifier to the 2.4 GHz trans-
ceiver, which then processes the power-down functions accordingly.
1.12.2 Host Controller Power Management
Power is automatically managed by the firmware based on input device activity. As a power-saving task, the firmware controls the
disabling of the on-chip regulator when in deep sleep mode.
Document Number: 002-14837 Rev. *L
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