BCM20730 Data Sheet
Serial Peripheral Interface
The ADC consists of an analog ADC core that performs the actual analog-to-digital conversion and digital
hardware that processes the output of the ADC core into valid ADC output samples. Directed by the firmware,
the digital hardware also controls the input multiplexers that select the ADC input signal V and the ADC
inp
reference signals V .
ref
Table 1: ADC Modes
Maximum Sampling Rate (kHz)
a
Mode
ENOB (Typical)
Latency (μs)
0
1
2
3
4
13
5.859
11.7
46.875
93.75
187
171
85
21
11
5
12.6
12
11.5
10
a. Settling time after switching channels.
Serial Peripheral Interface
The BCM20730 has two independent SPI interfaces. One is a master-only interface and the other can be either
a master or a slave. Each interface has a 16-byte transmit buffer and a 16-byte receive buffer. To support more
flexibility for user applications, the BCM20730 has optional I/O ports that can be configured individually and
separately for each functional pin, as shown in Table 2. The BCM20730 acts as an SPI master device that
supports 1.8V or 3.3V SPI slaves, as shown in Table 2. The BCM20730 can also act as an SPI slave device that
supports a 1.8V or 3.3V SPI master, as shown in Table 2.
Table 2: BCM20730 First SPI Set (Master Mode)
a
Pin Name
SPI_CLK
SPI_MOSI
SPI_MISO
SPI_CS
Configuration set 1
Configuration set 2
Configuration set 3
SCL
SCL
SCL
SDA
SDA
SDA
P24
P26
P32
–
–
P33
(Default for serial flash)
Configuration set 4
SCL
SDA
P39
–
a. Any GPIO can be used as SPI_CS when SPI is in master mode.
Table 3: BCM20730 Second SPI Set (Master Mode)
a
Pin Name
SPI_CLK
SPI_MOSI
SPI_MISO
SPI_CS
Configuration set 1
Configuration set 2
Configuration set 3
Configuration set 4
P3
P3
P3
P3
P0
P0
P2
P2
P1
P5
P1
P5
–
–
–
–
BROADCOM
®
September 9, 2013 • 20730-DS108-R
Page 18
BROADCOM CONFIDENTIAL
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