EZ-Link (AN2720SC)
P
IN DESCRIPTIONS
Signal name Pin
#
VSS
1
NC
2
Reserved
Reserved
AVSS
XTALIN
3
4
5
6
Type
GROUND
INPUT
INPUT
GROUND
INPUT
Driver
Description
Ground
Reserved for future use. Must
remain unconnected
Connect to Ground
Connect to Ground
Ground
Connect this signal to a 12Mhz
series resonant, fundamental
mode crystal and 22-33 pF
capacitor to GND. Data-rate
tolerance is ±0.25% (2,500ppm)
under all conditions.
Connect this signal to a 12Mhz
series resonant, fundamental
mode crystal and 22-33 pF
capacitor to GND. Data-rate
tolerance is ±0.25% (2,500ppm)
under all conditions.
Connect to MAIN3V and
decoupling caps.
Ground
Active low reset input
Connect to Ground
Connect to Ground
Connect to Ground
Data line for I
2
C bus. Requires
external 2.2K pullup.
Clock line for I
2
C bus. Requires
external 2.2K pullup.
Reserved – No connect
Ground
No connect
Connect to Ground
Connect to B-side VBUS.
Provides 3V for B-side D+ pullup
resistor. See the example circuit
for details on the use of this pin.
SPECIAL
XTALOUT
7
OUTPUT
SPECIAL
AVDD
VSS
RESET#
Reserved
Reserved
Reserved
SDA
SCL
NC
VSS
NC
Reserved
PULP5V
PULP3V
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Analog
POWER
GROUND
INPUT
INPUT
INPUT
INPUT
IO
IO
Reserved
GROUND
Reserved
INPUT
INPUT
OUTPUT
CMOS input
2mA CMOS bi-
dir
2mA CMOS bi-
dir
Reserved
Reserved
Reserved
Regulator
power input
Regulator
power output
AN2720 Data Sheet Version 1.0
06/07/00
Page 9
CYPRESS [ CYPRESS SEMICONDUCTOR ]
