One or more data records follow, starting at EEPROM address 7. The maximum value of
Length H is 0x03, allowing a maximum of 1,023 bytes per record. Each data record con-
sists of a length, a starting address, and a block of data bytes. The last data record must
have the MSB of its Length H byte set to 1. The last data record consists of a single-byte
load to the CPUCS register at 0x7F92. Only the LSB of this byte is significant—
8051RES (CPUCS.0) is set to zero to bring the 8051 out of reset.
Serial EEPROM data can be loaded into two EZ-USB RAM spaces only.
•
•
8051 program/data RAM at 0x0000-0x1B40.
The CPUCS register at 0x7F92 (only bit 0, 8051 RESET, is host-loadable).
VID/PID/DID in a “B2” EEPROM
Bytes 1-6 of a B2 EEPROM can be loaded with VID/PID/DID bytes if it is desired at
some point to run the 8051 program with ReNum=0 (EZ-USB core handles device
requests), using the EEPROM VID/PID/DID rather than the Cypress Semiconductor val-
ues built into the EZ-USB core.
5.9
ReNumeration
Three EZ-USB control bits in the USBCS (USB Control and Status) register control the
ReNumeration process: DISCON, DISCOE, and RENUM.
USBCS
USB Control and Status
7FD6
b7
b6
b5
b4
b3
b2
b1
b0
WAKESRC
-
-
-
DISCON
DISCOE
RENUM SIGRSUME
R/W
0
R
0
R
0
R
0
R/W
0
R/W
1
R/W
0
R/W
0
Figure 5-1. USB Control and Status Register
EZ-USB TRM v1.9
Chapter 5. EZ-USB CPU
Page 5-11
CYPRESS [ CYPRESS ]
