Table B-4. Special Function Registers
Register
TH2
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Addr
CDh
D0h
D8h
E0H
E8h
F0h
F8h
PSW
EICON(1)
ACC
EIE(1)
B
CY
AC
1
F0
RS1
RS0
OV
0
F1
0
P
0
SMOD1
ERESI
RESI
INT6
1
1
1
1
1
1
EWDI
PX6
EX5
PX5
EX4
PX4
EI2C
PI2C
EUSB
PUSB
EIP(1)
(1) Not part of standard 8051 architecture.
Table B-5. Special Function Register Reset Values
Register
SP
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Addr
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
91h
DPL0
DPH0
DPL1(1)
DPH1(1)
DPS(1)
PCON
TCON
TMOD
TL0
TL1
TH0
TH1
CKCON(1)
SPC_FNC(1)
EXIF(1)
B - 14
Appendix B: 8051 Architectural Overview
EZ-USB TRM v1.9
CYPRESS [ CYPRESS ]
