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AN2131QC 参数 Datasheet PDF下载

AN2131QC图片预览
型号: AN2131QC
PDF下载: 下载PDF文件 查看货源
内容描述: 在EZ - USBTM集成电路 [The EZ-USBTM Integrated Circuit]
分类和应用:
文件页数/大小: 334 页 / 1468 K
品牌: CYPRESS [ CYPRESS ]
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Table B-2. 8051 Instruction Set  
Instr.  
Cycles  
Hex  
Code  
Mnemonic  
JNB bit, rel  
Description  
Byte  
Jump on direct bit = 0  
3
3
1
2
2
3
3
3
3
2
3
4
4
3
3
3
4
4
4
4
3
4
30  
10  
JBC bit, rel  
Jump on direct bit = 1 and clear  
Jump indirect relative DPTR  
JMP @ A+DPTR  
JZ rel  
73  
Jump on accumulator = 0  
60  
JNZ rel  
Jump on accumulator /= 0  
70  
CJNE A, direct, rel  
CJNE A, #d, rel  
CJNE Rn, #d, rel  
CJNE @ Ri, #d, rel  
DJNZ Rn, rel  
DJNZ direct, rel  
Compare A, direct JNE relative  
Compare A, immediate JNE relative  
Compare reg, immediate JNE relative  
Compare Ind, immediate JNE relative  
Decrement register, JNZ relative  
Decrement direct byte, JNZ relative  
B5  
B4  
B8-BF  
B6-B7  
D8-DF  
D5  
Miscellaneous  
NOP  
No operation  
1
1
00  
There is an additional reserved opcode (A5) that performs the same function as NOP. All mnemonics  
are copyrighted. Intel Corporation 1980.  
B.1.3 Instruction Timing  
Instruction cycles in the 8051 core are 4 clock cycles in length, as opposed to the 12 clock  
cycles per instruction cycle in the standard 8051. This translates to a 3X improvement in  
execution time for most instructions.  
Some instructions require a different number of instruction cycles on the 8051 core than they  
do on the standard 8051. In the standard 8051, all instructions except for MULand DIVtake  
one or two instruction cycles to complete. In the 8051 core, instructions can take between one  
and five instruction cycles to complete.  
For example, in the standard 8051, the instructions MOVX A, @DPTRand MOV direct,  
directeach take 2 instruction cycles (24 clock cycles) to execute. In the 8051 core, MOVX  
A, @DPTRtakes two instruction cycles (8 clock cycles) and MOV direct, directtakes  
three instruction cycles (12 clock cycles). Both instructions execute faster on the 8051 core  
than they do on the standard 8051, but require different numbers of clock cycles.  
For timing of real-time events, use the numbers of instruction cycles from Table B-1. to  
calculate the timing of software loops. The bytes column indicates the number of memory  
EZ-USB v1.9  
Appendix B: 8051 Architectural Overview  
B - 9  
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