IN07IRQ
Endpoints 0-7 IN Interrupt Requests
7FA9
b7
b6
b5
b4
b3
b2
b1
b0
IN0IR
IN7IR
IN6IR
IN5IR
IN4IR
IN3IR
IN2IR
IN1IR
OUT07IRQ
Endpoints 0-7 OUT Interrupt Requests
7FAA
b7
b6
b5
b4
b3
b2
b1
b0
OUT7IR
OUT6IR
OUT5IR
OUT4IR
OUT3IR
OUT2IR
OUT1IR
OUT0IR
USBIRQ
USB Interrupt Request
7FAB
b7
b6
b5
b4
b3
b2
b1
b0
-
-
-
USESIR
SUSPIR
SUTOKIR
SOFIR
SUDAVIR
IN07IEN
Endpoints 0-7 IN Interrupt Enables
7FAC
b7
b6
b5
b4
b3
b2
b1
b0
IN7IEN
IN6IEN
IN5IEN
IN4IEN
IN3IEN
IN2IEN
IN1IEN
IN0IEN
OUT07IEN
Endpoints 0-7 OUT Interrupt Enables
7FAD
b7
b6
b5
b4
b3
b2
b1
b0
OUT7IEN
OUT6IEN
OUT5IEN
OUT4IEN
OUT3IEN
OUT2IEN
OUT1IEN
OUT0IEN
USBIEN
USB Interrupt Enables
7FAE
b7
b6
b5
b4
b3
b2
b1
b0
-
-
-
URESIE
SUSPIE
SUTOKIE
SOFIE
SUDAVIE
Figure 9-4. EZ-USB Interrupt Registers
Figure 9-4 shows the registers associated with the USB interrupts. Each interrupt source
has an enable (IEN) and a request (IRQ) bit. The 8051 sets the IEN bit to enable the inter-
rupt. The USB core sets an IRQ bit high to request an interrupt, and the 8051 clears an
IRQ bit by writing a “1” to it.
EZ-USB TRM v1.9
Chapter 9. EZ-USB Interrupts
Page 9-7
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