P R E L I M I N A R Y
SWITCHING WAVEFORMS
Data Polling
tWC
555H
tAS
PA
ADDRESSES
PA
tAH
WE
OE
tGHWL
tCP
tWHWH1_or_2
CE
tWS
tCPH
tDS
tDH
DQ7
DOUT
A0H
PD
DATA
VCC
tVCS
Notes:
1. PA is address of the memory location to be programmed.
2. PD is data to be programmed at byte address.
3. DQ7 is the complement of the data written to the device.
4. D
is the data written to the device.
OUT
5. Figure indicates last two bus cycles of four bus cycle sequence.
20511C-23
Figure 20. Alternate CE Controlled Write Operation Timings
36
Am29LV008T/Am29LV008B
CYPRESS [ CYPRESS ]
