P R E L I M I N A R Y
AC CHARACTERISTICS
Read-Only Operations Characteristics
Parameter Symbols
Speed Option (Note 1)
JEDEC Standard Description
Test Setup
Min
-90R -100
-120
-150
Unit
t
t
Read Cycle Time (Note 3)
Address to Output Delay
90
90
100
100
120
150
ns
AVAV
RC
CE = V
IL
t
t
Max
120
150
ns
AVQV
ACC
OE = V
IL
t
t
t
t
t
t
t
t
Chip Enable to Output Delay
OE = V
Max
Max
Max
Max
90
40
30
30
100
40
120
50
150
55
ns
ns
ns
ns
ELQV
GLQV
EHQZ
GHQZ
CE
OE
DF
DF
IL
Output Enable to Output Delay
Chip Enable to Output High Z (Notes 2, 3)
Output Enable to Output High Z (Notes 2, 3)
30
30
40
30
30
40
Output Hold Time From Addresses, CE or
OE, Whichever Occurs First (Note 3)
t
t
t
Min
0
0
0
0
ns
AXQX
OH
RESET Pin Low to Read Mode (Note 3)
Max
20
20
20
20
µs
Ready
Notes:
1. Test Conditions
Input Rise and Fall Times: 5 ns
Input Pulse Levels: 0.0 V to 3.0 V
Timing Measurement Reference Level:
Input: 1.5 V
Output: 1.5 V
2. Output Driver Disable Time
3. Not 100% tested.
3.3 V
IN3064
or Equivalent
2.7 kΩ
Device
Under
Test
C
L
6.2 kΩ
IN3064 or Equivalent
IN3064 or Equivalent
IN3064 or Equivalent
Notes:
C = 30 pF for 90 and 100 ns
L
C = 100 pF for 120 and 150 ns
L
20511C-12
Figure 9. Test Conditions
28
Am29LV008T/Am29LV008B